![Vladimir Murzin](/assets/img/avatar_default.png)
Currently, there are several issues with how MPU is setup: 1. We won't boot if MPU is missing 2. We won't boot if use XIP 3. Further extension of MPU setup requires asm skills The 1st point can be relaxed, so we can continue with boot CPU even if MPU is missed and fail boot for secondaries only. To address the 2nd point we could create region covering CONFIG_XIP_PHYS_ADDR - _end and that might work for the first stage of MPU enable, but due to MPU's alignment requirement we could cover too much, IOW we need more flexibility in how we're partitioning memory regions... and it'd be hardly possible to archive because of the 3rd point. This patch is trying to address 1st and 3rd issues and paves the path for 2nd and further improvements. The most visible change introduced with this patch is that we start using mpu_rgn_info array (as it was supposed?), so change in MPU setup done by boot CPU is recorded there and feed to secondaries. It allows us to keep minimal region setup for boot CPU and do the rest in C. Since we start programming MPU regions in C evaluation of MPU constrains (number of regions supported and minimal region order) can be done once, which in turn open possibility to free-up "probe" region early. Tested-by: Szemző András <sza@esh.hu> Tested-by: Alexandre TORGUE <alexandre.torgue@st.com> Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
203 lines
7.9 KiB
C
203 lines
7.9 KiB
C
/*
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* Copyright (C) 1995-2003 Russell King
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* 2001-2002 Keith Owens
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*
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* Generate definitions needed by assembly language modules.
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* This code generates raw asm output which is post-processed to extract
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* and format the required data.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/compiler.h>
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/dma-mapping.h>
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#ifdef CONFIG_KVM_ARM_HOST
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#include <linux/kvm_host.h>
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#endif
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#include <asm/cacheflush.h>
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#include <asm/glue-df.h>
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#include <asm/glue-pf.h>
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#include <asm/mach/arch.h>
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#include <asm/thread_info.h>
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#include <asm/memory.h>
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#include <asm/mpu.h>
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#include <asm/procinfo.h>
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#include <asm/suspend.h>
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#include <asm/vdso_datapage.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <linux/kbuild.h>
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#include "signal.h"
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/*
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* Make sure that the compiler and target are compatible.
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*/
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#if defined(__APCS_26__)
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#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
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#endif
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/*
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* GCC 3.0, 3.1: general bad code generation.
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* GCC 3.2.0: incorrect function argument offset calculation.
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* GCC 3.2.x: miscompiles NEW_AUX_ENT in fs/binfmt_elf.c
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* (http://gcc.gnu.org/PR8896) and incorrect structure
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* initialisation in fs/jffs2/erase.c
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* GCC 4.8.0-4.8.2: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58854
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* miscompiles find_get_entry(), and can result in EXT3 and EXT4
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* filesystem corruption (possibly other FS too).
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*/
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#ifdef __GNUC__
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#if (__GNUC__ == 3 && __GNUC_MINOR__ < 3)
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#error Your compiler is too buggy; it is known to miscompile kernels.
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#error Known good compilers: 3.3, 4.x
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#endif
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#if GCC_VERSION >= 40800 && GCC_VERSION < 40803
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#error Your compiler is too buggy; it is known to miscompile kernels
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#error and result in filesystem corruption and oopses.
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#endif
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#endif
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int main(void)
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{
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DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
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#ifdef CONFIG_CC_STACKPROTECTOR
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DEFINE(TSK_STACK_CANARY, offsetof(struct task_struct, stack_canary));
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#endif
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BLANK();
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DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
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DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
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DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
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DEFINE(TI_TASK, offsetof(struct thread_info, task));
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DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
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DEFINE(TI_CPU_DOMAIN, offsetof(struct thread_info, cpu_domain));
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DEFINE(TI_CPU_SAVE, offsetof(struct thread_info, cpu_context));
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DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp));
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DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value));
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DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate));
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#ifdef CONFIG_VFP
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DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
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#ifdef CONFIG_SMP
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DEFINE(VFP_CPU, offsetof(union vfp_state, hard.cpu));
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#endif
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#endif
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#ifdef CONFIG_ARM_THUMBEE
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DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state));
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#endif
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#ifdef CONFIG_IWMMXT
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DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt));
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#endif
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#ifdef CONFIG_CRUNCH
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DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate));
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#endif
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BLANK();
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DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0));
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DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1));
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DEFINE(S_R2, offsetof(struct pt_regs, ARM_r2));
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DEFINE(S_R3, offsetof(struct pt_regs, ARM_r3));
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DEFINE(S_R4, offsetof(struct pt_regs, ARM_r4));
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DEFINE(S_R5, offsetof(struct pt_regs, ARM_r5));
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DEFINE(S_R6, offsetof(struct pt_regs, ARM_r6));
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DEFINE(S_R7, offsetof(struct pt_regs, ARM_r7));
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DEFINE(S_R8, offsetof(struct pt_regs, ARM_r8));
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DEFINE(S_R9, offsetof(struct pt_regs, ARM_r9));
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DEFINE(S_R10, offsetof(struct pt_regs, ARM_r10));
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DEFINE(S_FP, offsetof(struct pt_regs, ARM_fp));
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DEFINE(S_IP, offsetof(struct pt_regs, ARM_ip));
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DEFINE(S_SP, offsetof(struct pt_regs, ARM_sp));
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DEFINE(S_LR, offsetof(struct pt_regs, ARM_lr));
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DEFINE(S_PC, offsetof(struct pt_regs, ARM_pc));
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DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr));
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DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0));
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DEFINE(PT_REGS_SIZE, sizeof(struct pt_regs));
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DEFINE(SVC_DACR, offsetof(struct svc_pt_regs, dacr));
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DEFINE(SVC_ADDR_LIMIT, offsetof(struct svc_pt_regs, addr_limit));
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DEFINE(SVC_REGS_SIZE, sizeof(struct svc_pt_regs));
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BLANK();
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DEFINE(SIGFRAME_RC3_OFFSET, offsetof(struct sigframe, retcode[3]));
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DEFINE(RT_SIGFRAME_RC3_OFFSET, offsetof(struct rt_sigframe, sig.retcode[3]));
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BLANK();
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#ifdef CONFIG_CACHE_L2X0
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DEFINE(L2X0_R_PHY_BASE, offsetof(struct l2x0_regs, phy_base));
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DEFINE(L2X0_R_AUX_CTRL, offsetof(struct l2x0_regs, aux_ctrl));
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DEFINE(L2X0_R_TAG_LATENCY, offsetof(struct l2x0_regs, tag_latency));
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DEFINE(L2X0_R_DATA_LATENCY, offsetof(struct l2x0_regs, data_latency));
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DEFINE(L2X0_R_FILTER_START, offsetof(struct l2x0_regs, filter_start));
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DEFINE(L2X0_R_FILTER_END, offsetof(struct l2x0_regs, filter_end));
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DEFINE(L2X0_R_PREFETCH_CTRL, offsetof(struct l2x0_regs, prefetch_ctrl));
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DEFINE(L2X0_R_PWR_CTRL, offsetof(struct l2x0_regs, pwr_ctrl));
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BLANK();
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#endif
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#ifdef CONFIG_CPU_HAS_ASID
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DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id.counter));
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BLANK();
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#endif
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DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
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DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
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BLANK();
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DEFINE(VM_EXEC, VM_EXEC);
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BLANK();
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DEFINE(PAGE_SZ, PAGE_SIZE);
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BLANK();
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DEFINE(SYS_ERROR0, 0x9f0000);
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BLANK();
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DEFINE(SIZEOF_MACHINE_DESC, sizeof(struct machine_desc));
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DEFINE(MACHINFO_TYPE, offsetof(struct machine_desc, nr));
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DEFINE(MACHINFO_NAME, offsetof(struct machine_desc, name));
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BLANK();
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DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list));
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DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
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DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
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DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags));
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BLANK();
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#ifdef MULTI_DABORT
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DEFINE(PROCESSOR_DABT_FUNC, offsetof(struct processor, _data_abort));
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#endif
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#ifdef MULTI_PABORT
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DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort));
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#endif
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#ifdef MULTI_CPU
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DEFINE(CPU_SLEEP_SIZE, offsetof(struct processor, suspend_size));
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DEFINE(CPU_DO_SUSPEND, offsetof(struct processor, do_suspend));
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DEFINE(CPU_DO_RESUME, offsetof(struct processor, do_resume));
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#endif
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#ifdef MULTI_CACHE
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DEFINE(CACHE_FLUSH_KERN_ALL, offsetof(struct cpu_cache_fns, flush_kern_all));
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#endif
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#ifdef CONFIG_ARM_CPU_SUSPEND
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DEFINE(SLEEP_SAVE_SP_SZ, sizeof(struct sleep_save_sp));
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DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys));
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DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash));
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#endif
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BLANK();
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DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
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DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
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DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
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BLANK();
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DEFINE(CACHE_WRITEBACK_ORDER, __CACHE_WRITEBACK_ORDER);
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DEFINE(CACHE_WRITEBACK_GRANULE, __CACHE_WRITEBACK_GRANULE);
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BLANK();
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#ifdef CONFIG_KVM_ARM_HOST
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DEFINE(VCPU_GUEST_CTXT, offsetof(struct kvm_vcpu, arch.ctxt));
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DEFINE(VCPU_HOST_CTXT, offsetof(struct kvm_vcpu, arch.host_cpu_context));
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DEFINE(CPU_CTXT_VFP, offsetof(struct kvm_cpu_context, vfp));
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DEFINE(CPU_CTXT_GP_REGS, offsetof(struct kvm_cpu_context, gp_regs));
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DEFINE(GP_REGS_USR, offsetof(struct kvm_regs, usr_regs));
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#endif
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BLANK();
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#ifdef CONFIG_VDSO
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DEFINE(VDSO_DATA_SIZE, sizeof(union vdso_data_store));
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#endif
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BLANK();
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#ifdef CONFIG_ARM_MPU
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DEFINE(MPU_RNG_INFO_RNGS, offsetof(struct mpu_rgn_info, rgns));
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DEFINE(MPU_RNG_INFO_USED, offsetof(struct mpu_rgn_info, used));
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DEFINE(MPU_RNG_SIZE, sizeof(struct mpu_rgn));
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DEFINE(MPU_RGN_DRBAR, offsetof(struct mpu_rgn, drbar));
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DEFINE(MPU_RGN_DRSR, offsetof(struct mpu_rgn, drsr));
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DEFINE(MPU_RGN_DRACR, offsetof(struct mpu_rgn, dracr));
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#endif
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return 0;
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}
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