134 lines
2.8 KiB
C
134 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 ARM Ltd.
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*/
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#ifndef __ASM_IRQFLAGS_H
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#define __ASM_IRQFLAGS_H
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#ifdef __KERNEL__
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#include <asm/alternative.h>
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#include <asm/ptrace.h>
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#include <asm/sysreg.h>
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/*
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* Aarch64 has flags for masking: Debug, Asynchronous (serror), Interrupts and
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* FIQ exceptions, in the 'daif' register. We mask and unmask them in 'dai'
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* order:
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* Masking debug exceptions causes all other exceptions to be masked too/
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* Masking SError masks irq, but not debug exceptions. Masking irqs has no
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* side effects for other flags. Keeping to this order makes it easier for
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* entry.S to know which exceptions should be unmasked.
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*
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* FIQ is never expected, but we mask it when we disable debug exceptions, and
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* unmask it at all other times.
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*/
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/*
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* CPU interrupt mask handling.
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*/
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static inline void arch_local_irq_enable(void)
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{
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asm volatile(ALTERNATIVE(
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"msr daifclr, #2 // arch_local_irq_enable\n"
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"nop",
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__msr_s(SYS_ICC_PMR_EL1, "%0")
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"dsb sy",
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ARM64_HAS_IRQ_PRIO_MASKING)
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:
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: "r" ((unsigned long) GIC_PRIO_IRQON)
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: "memory");
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}
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static inline void arch_local_irq_disable(void)
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{
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asm volatile(ALTERNATIVE(
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"msr daifset, #2 // arch_local_irq_disable",
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__msr_s(SYS_ICC_PMR_EL1, "%0"),
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ARM64_HAS_IRQ_PRIO_MASKING)
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:
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: "r" ((unsigned long) GIC_PRIO_IRQOFF)
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: "memory");
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}
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/*
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* Save the current interrupt enable state.
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*/
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static inline unsigned long arch_local_save_flags(void)
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{
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unsigned long daif_bits;
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unsigned long flags;
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daif_bits = read_sysreg(daif);
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/*
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* The asm is logically equivalent to:
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*
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* if (system_uses_irq_prio_masking())
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* flags = (daif_bits & PSR_I_BIT) ?
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* GIC_PRIO_IRQOFF :
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* read_sysreg_s(SYS_ICC_PMR_EL1);
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* else
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* flags = daif_bits;
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*/
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asm volatile(ALTERNATIVE(
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"mov %0, %1\n"
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"nop\n"
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"nop",
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__mrs_s("%0", SYS_ICC_PMR_EL1)
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"ands %1, %1, " __stringify(PSR_I_BIT) "\n"
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"csel %0, %0, %2, eq",
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ARM64_HAS_IRQ_PRIO_MASKING)
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: "=&r" (flags), "+r" (daif_bits)
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: "r" ((unsigned long) GIC_PRIO_IRQOFF)
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: "memory");
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return flags;
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}
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static inline unsigned long arch_local_irq_save(void)
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{
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unsigned long flags;
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flags = arch_local_save_flags();
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arch_local_irq_disable();
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return flags;
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}
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/*
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* restore saved IRQ state
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*/
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static inline void arch_local_irq_restore(unsigned long flags)
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{
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asm volatile(ALTERNATIVE(
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"msr daif, %0\n"
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"nop",
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__msr_s(SYS_ICC_PMR_EL1, "%0")
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"dsb sy",
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ARM64_HAS_IRQ_PRIO_MASKING)
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: "+r" (flags)
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:
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: "memory");
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}
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static inline int arch_irqs_disabled_flags(unsigned long flags)
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{
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int res;
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asm volatile(ALTERNATIVE(
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"and %w0, %w1, #" __stringify(PSR_I_BIT) "\n"
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"nop",
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"cmp %w1, #" __stringify(GIC_PRIO_IRQOFF) "\n"
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"cset %w0, ls",
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ARM64_HAS_IRQ_PRIO_MASKING)
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: "=&r" (res)
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: "r" ((int) flags)
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: "memory");
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return res;
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}
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#endif
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#endif
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