![YueHaibing](/assets/img/avatar_default.png)
devm_platform_ioremap_resource() internally have platform_get_resource() and devm_ioremap_resource() in it. So instead of calling them separately use devm_platform_ioremap_resource() directly. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20191104142654.39256-1-yuehaibing@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
266 lines
8.8 KiB
C
266 lines
8.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Marvell PXA25x family pin control
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*
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* Copyright (C) 2016 Robert Jarzmik
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include "pinctrl-pxa2xx.h"
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static const struct pxa_desc_pin pxa25x_pins[] = {
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PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(0)),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(1),
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PXA_FUNCTION(0, 1, "GP_RST")),
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PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(2)),
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PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(3)),
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PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(4)),
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PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(5)),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(6),
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PXA_FUNCTION(1, 1, "MMCCLK")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(7),
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PXA_FUNCTION(1, 1, "48_MHz")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(8),
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PXA_FUNCTION(1, 1, "MMCCS0")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(9),
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PXA_FUNCTION(1, 1, "MMCCS1")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(10),
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PXA_FUNCTION(1, 1, "RTCCLK")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(11),
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PXA_FUNCTION(1, 1, "3_6_MHz")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(12),
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PXA_FUNCTION(1, 1, "32_kHz")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(13),
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PXA_FUNCTION(1, 2, "MBGNT")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(14),
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PXA_FUNCTION(0, 1, "MBREQ")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(15),
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PXA_FUNCTION(1, 2, "nCS_1")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(16),
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PXA_FUNCTION(1, 2, "PWM0")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(17),
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PXA_FUNCTION(1, 2, "PWM1")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(18),
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PXA_FUNCTION(0, 1, "RDY")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(19),
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PXA_FUNCTION(0, 1, "DREQ[1]")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(20),
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PXA_FUNCTION(0, 1, "DREQ[0]")),
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PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(21)),
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PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(22)),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(23),
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PXA_FUNCTION(1, 2, "SCLK")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(24),
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PXA_FUNCTION(1, 2, "SFRM")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(25),
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PXA_FUNCTION(1, 2, "TXD")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(26),
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PXA_FUNCTION(0, 1, "RXD")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(27),
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PXA_FUNCTION(0, 1, "EXTCLK")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(28),
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PXA_FUNCTION(0, 1, "BITCLK"),
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PXA_FUNCTION(0, 2, "BITCLK"),
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PXA_FUNCTION(1, 1, "BITCLK")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(29),
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PXA_FUNCTION(0, 1, "SDATA_IN0"),
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PXA_FUNCTION(0, 2, "SDATA_IN")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(30),
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PXA_FUNCTION(1, 1, "SDATA_OUT"),
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PXA_FUNCTION(1, 2, "SDATA_OUT")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(31),
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PXA_FUNCTION(1, 1, "SYNC"),
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PXA_FUNCTION(1, 2, "SYNC")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(32),
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PXA_FUNCTION(0, 1, "SDATA_IN1"),
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PXA_FUNCTION(1, 1, "SYSCLK")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(33),
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PXA_FUNCTION(1, 2, "nCS[5]")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(34),
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PXA_FUNCTION(0, 1, "FFRXD"),
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PXA_FUNCTION(1, 2, "MMCCS0")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(35),
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PXA_FUNCTION(0, 1, "CTS")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(36),
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PXA_FUNCTION(0, 1, "DCD")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(37),
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PXA_FUNCTION(0, 1, "DSR")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(38),
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PXA_FUNCTION(0, 1, "RI")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(39),
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PXA_FUNCTION(1, 1, "MMCC1"),
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PXA_FUNCTION(1, 2, "FFTXD")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(40),
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PXA_FUNCTION(1, 2, "DTR")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(41),
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PXA_FUNCTION(1, 2, "RTS")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(42),
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PXA_FUNCTION(0, 1, "BTRXD"),
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PXA_FUNCTION(0, 3, "HWRXD")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(43),
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PXA_FUNCTION(1, 2, "BTTXD"),
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PXA_FUNCTION(1, 3, "HWTXD")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(44),
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PXA_FUNCTION(0, 1, "BTCTS"),
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PXA_FUNCTION(0, 3, "HWCTS")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(45),
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PXA_FUNCTION(1, 2, "BTRTS"),
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PXA_FUNCTION(1, 3, "HWRTS")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(46),
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PXA_FUNCTION(0, 1, "ICP_RXD"),
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PXA_FUNCTION(0, 2, "RXD")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(47),
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PXA_FUNCTION(1, 1, "TXD"),
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PXA_FUNCTION(1, 2, "ICP_TXD")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(48),
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PXA_FUNCTION(1, 1, "HWTXD"),
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PXA_FUNCTION(1, 2, "nPOE")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(49),
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PXA_FUNCTION(0, 1, "HWRXD"),
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PXA_FUNCTION(1, 2, "nPWE")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(50),
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PXA_FUNCTION(0, 1, "HWCTS"),
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PXA_FUNCTION(1, 2, "nPIOR")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(51),
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PXA_FUNCTION(1, 1, "HWRTS"),
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PXA_FUNCTION(1, 2, "nPIOW")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(52),
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PXA_FUNCTION(1, 2, "nPCE[1]")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(53),
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PXA_FUNCTION(1, 1, "MMCCLK"),
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PXA_FUNCTION(1, 2, "nPCE[2]")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(54),
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PXA_FUNCTION(1, 1, "MMCCLK"),
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PXA_FUNCTION(1, 2, "nPSKTSEL")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(55),
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PXA_FUNCTION(1, 2, "nPREG")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(56),
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PXA_FUNCTION(0, 1, "nPWAIT")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(57),
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PXA_FUNCTION(0, 1, "nIOIS16")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(58),
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PXA_FUNCTION(1, 2, "LDD<0>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(59),
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PXA_FUNCTION(1, 2, "LDD<1>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(60),
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PXA_FUNCTION(1, 2, "LDD<2>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(61),
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PXA_FUNCTION(1, 2, "LDD<3>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(62),
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PXA_FUNCTION(1, 2, "LDD<4>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(63),
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PXA_FUNCTION(1, 2, "LDD<5>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(64),
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PXA_FUNCTION(1, 2, "LDD<6>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(65),
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PXA_FUNCTION(1, 2, "LDD<7>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(66),
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PXA_FUNCTION(0, 1, "MBREQ"),
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PXA_FUNCTION(1, 2, "LDD<8>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(67),
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PXA_FUNCTION(1, 1, "MMCCS0"),
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PXA_FUNCTION(1, 2, "LDD<9>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(68),
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PXA_FUNCTION(1, 1, "MMCCS1"),
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PXA_FUNCTION(1, 2, "LDD<10>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(69),
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PXA_FUNCTION(1, 1, "MMCCLK"),
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PXA_FUNCTION(1, 2, "LDD<11>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(70),
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PXA_FUNCTION(1, 1, "RTCCLK"),
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PXA_FUNCTION(1, 2, "LDD<12>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(71),
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PXA_FUNCTION(1, 1, "3_6_MHz"),
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PXA_FUNCTION(1, 2, "LDD<13>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(72),
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PXA_FUNCTION(1, 1, "32_kHz"),
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PXA_FUNCTION(1, 2, "LDD<14>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(73),
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PXA_FUNCTION(1, 1, "MBGNT"),
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PXA_FUNCTION(1, 2, "LDD<15>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(74),
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PXA_FUNCTION(1, 2, "LCD_FCLK")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(75),
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PXA_FUNCTION(1, 2, "LCD_LCLK")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(76),
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PXA_FUNCTION(1, 2, "LCD_PCLK")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(77),
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PXA_FUNCTION(1, 2, "LCD_ACBIAS")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(78),
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PXA_FUNCTION(1, 2, "nCS<2>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(79),
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PXA_FUNCTION(1, 2, "nCS<3>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(80),
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PXA_FUNCTION(1, 2, "nCS<4>")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(81),
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PXA_FUNCTION(0, 1, "NSSPSCLK"),
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PXA_FUNCTION(1, 1, "NSSPSCLK")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(82),
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PXA_FUNCTION(0, 1, "NSSPSFRM"),
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PXA_FUNCTION(1, 1, "NSSPSFRM")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(83),
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PXA_FUNCTION(0, 2, "NSSPRXD"),
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PXA_FUNCTION(1, 1, "NSSPTXD")),
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PXA_GPIO_PIN(PXA_PINCTRL_PIN(84),
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PXA_FUNCTION(0, 2, "NSSPRXD"),
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PXA_FUNCTION(1, 1, "NSSPTXD")),
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};
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static int pxa25x_pinctrl_probe(struct platform_device *pdev)
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{
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int ret, i;
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void __iomem *base_af[8];
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void __iomem *base_dir[4];
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void __iomem *base_sleep[4];
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base_af[0] = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(base_af[0]))
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return PTR_ERR(base_af[0]);
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base_dir[0] = devm_platform_ioremap_resource(pdev, 1);
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if (IS_ERR(base_dir[0]))
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return PTR_ERR(base_dir[0]);
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base_dir[3] = devm_platform_ioremap_resource(pdev, 2);
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if (IS_ERR(base_dir[3]))
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return PTR_ERR(base_dir[3]);
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base_sleep[0] = devm_platform_ioremap_resource(pdev, 3);
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if (IS_ERR(base_sleep[0]))
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return PTR_ERR(base_sleep[0]);
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for (i = 0; i < ARRAY_SIZE(base_af); i++)
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base_af[i] = base_af[0] + sizeof(base_af[0]) * i;
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for (i = 0; i < 3; i++)
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base_dir[i] = base_dir[0] + sizeof(base_dir[0]) * i;
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for (i = 0; i < ARRAY_SIZE(base_sleep); i++)
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base_sleep[i] = base_sleep[0] + sizeof(base_af[0]) * i;
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ret = pxa2xx_pinctrl_init(pdev, pxa25x_pins, ARRAY_SIZE(pxa25x_pins),
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base_af, base_dir, base_sleep);
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return ret;
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}
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static const struct of_device_id pxa25x_pinctrl_match[] = {
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{ .compatible = "marvell,pxa25x-pinctrl", },
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{}
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};
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MODULE_DEVICE_TABLE(of, pxa25x_pinctrl_match);
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static struct platform_driver pxa25x_pinctrl_driver = {
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.probe = pxa25x_pinctrl_probe,
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.driver = {
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.name = "pxa25x-pinctrl",
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.of_match_table = pxa25x_pinctrl_match,
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},
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};
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module_platform_driver(pxa25x_pinctrl_driver);
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MODULE_AUTHOR("Robert Jarzmik <robert.jarzmik@free.fr>");
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MODULE_DESCRIPTION("Marvell PXA25x pinctrl driver");
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MODULE_LICENSE("GPL v2");
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