![Linus Torvalds](/assets/img/avatar_default.png)
Pull timer changes from Thomas Gleixner: "This assorted collection provides: - A new timer based timer broadcast feature for systems which do not provide a global accessible timer device. That allows those systems to put CPUs into deep idle states where the per cpu timer device stops. - A few NOHZ_FULL related improvements to the timer wheel - The usual updates to timer devices found in ARM SoCs - Small improvements and updates all over the place" * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (44 commits) tick: Remove code duplication in tick_handle_periodic() tick: Fix spelling mistake in tick_handle_periodic() x86: hpet: Use proper destructor for delayed work workqueue: Provide destroy_delayed_work_on_stack() clocksource: CMT, MTU2, TMU and STI should depend on GENERIC_CLOCKEVENTS timer: Remove code redundancy while calling get_nohz_timer_target() hrtimer: Rearrange comments in the order struct members are declared timer: Use variable head instead of &work_list in __run_timers() clocksource: exynos_mct: silence a static checker warning arm: zynq: Add support for cpufreq arm: zynq: Don't use arm_global_timer with cpufreq clocksource/cadence_ttc: Overhaul clocksource frequency adjustment clocksource/cadence_ttc: Call clockevents_update_freq() with IRQs enabled clocksource: Add Kconfig entries for CMT, MTU2, TMU and STI sh: Remove Kconfig entries for TMU, CMT and MTU2 ARM: shmobile: Remove CMT, TMU and STI Kconfig entries clocksource: armada-370-xp: Use atomic access for shared registers clocksource: orion: Use atomic access for shared registers clocksource: timer-keystone: Delete unnecessary variable clocksource: timer-keystone: introduce clocksource driver for Keystone ...
139 lines
3.4 KiB
C
139 lines
3.4 KiB
C
/*
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* This file contains common code that is intended to be used across
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* boards so that it's not replicated.
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*
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* Copyright (C) 2011 Xilinx
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/cpumask.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/clk/zynq.h>
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#include <linux/clocksource.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/of.h>
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#include <linux/memblock.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/arm-gic.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <asm/mach-types.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/smp_scu.h>
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#include <asm/hardware/cache-l2x0.h>
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#include "common.h"
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void __iomem *zynq_scu_base;
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/**
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* zynq_memory_init - Initialize special memory
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*
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* We need to stop things allocating the low memory as DMA can't work in
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* the 1st 512K of memory.
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*/
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static void __init zynq_memory_init(void)
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{
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if (!__pa(PAGE_OFFSET))
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memblock_reserve(__pa(PAGE_OFFSET), __pa(swapper_pg_dir));
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}
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static struct platform_device zynq_cpuidle_device = {
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.name = "cpuidle-zynq",
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};
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/**
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* zynq_init_machine - System specific initialization, intended to be
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* called from board specific initialization.
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*/
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static void __init zynq_init_machine(void)
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{
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struct platform_device_info devinfo = { .name = "cpufreq-cpu0", };
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/*
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* 64KB way size, 8-way associativity, parity disabled
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*/
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l2x0_of_init(0x02060000, 0xF0F0FFFF);
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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platform_device_register(&zynq_cpuidle_device);
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platform_device_register_full(&devinfo);
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}
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static void __init zynq_timer_init(void)
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{
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zynq_slcr_init();
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clocksource_of_init();
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}
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static struct map_desc zynq_cortex_a9_scu_map __initdata = {
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.length = SZ_256,
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.type = MT_DEVICE,
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};
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static void __init zynq_scu_map_io(void)
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{
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unsigned long base;
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base = scu_a9_get_base();
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zynq_cortex_a9_scu_map.pfn = __phys_to_pfn(base);
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/* Expected address is in vmalloc area that's why simple assign here */
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zynq_cortex_a9_scu_map.virtual = base;
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iotable_init(&zynq_cortex_a9_scu_map, 1);
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zynq_scu_base = (void __iomem *)base;
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BUG_ON(!zynq_scu_base);
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}
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/**
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* zynq_map_io - Create memory mappings needed for early I/O.
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*/
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static void __init zynq_map_io(void)
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{
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debug_ll_io_init();
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zynq_scu_map_io();
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}
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static void __init zynq_irq_init(void)
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{
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gic_arch_extn.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
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irqchip_init();
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}
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static void zynq_system_reset(enum reboot_mode mode, const char *cmd)
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{
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zynq_slcr_system_reset();
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}
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static const char * const zynq_dt_match[] = {
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"xlnx,zynq-7000",
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NULL
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};
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DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
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.smp = smp_ops(zynq_smp_ops),
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.map_io = zynq_map_io,
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.init_irq = zynq_irq_init,
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.init_machine = zynq_init_machine,
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.init_time = zynq_timer_init,
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.dt_compat = zynq_dt_match,
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.reserve = zynq_memory_init,
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.restart = zynq_system_reset,
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MACHINE_END
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