6d45a4028c
This patch adds cpuidle support for i.MX7ULP, 3 cpuidle states supported as below: 1. WFI, just ARM wfi; 2. WAIT mode, mapped to SoC's partial stop mode #3; 3. STOP mode, mapped to SoC's partial stop mode #1. In WAIT mode, system clock and bus clock will be enabled; In STOP mode, system clock and bus clock will be disabled. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
41 lines
892 B
C
41 lines
892 B
C
/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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* Copyright 2012 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#ifdef CONFIG_CPU_IDLE
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extern int imx5_cpuidle_init(void);
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extern int imx6q_cpuidle_init(void);
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extern int imx6sl_cpuidle_init(void);
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extern int imx6sx_cpuidle_init(void);
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extern int imx7ulp_cpuidle_init(void);
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#else
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static inline int imx5_cpuidle_init(void)
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{
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return 0;
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}
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static inline int imx6q_cpuidle_init(void)
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{
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return 0;
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}
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static inline int imx6sl_cpuidle_init(void)
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{
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return 0;
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}
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static inline int imx6sx_cpuidle_init(void)
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{
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return 0;
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}
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static inline int imx7ulp_cpuidle_init(void)
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{
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return 0;
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}
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#endif
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