![Sachin Kamat](/assets/img/avatar_default.png)
'offset’ is not used in the function. Remove it. Signed-off-by: Sachin Kamat <sachin.kamat@samsung.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
249 lines
5.8 KiB
C
249 lines
5.8 KiB
C
/*
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* Xilinx XADC driver
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*
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* Copyright 2013 Analog Devices Inc.
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* Author: Lars-Peter Clauen <lars@metafoo.de>
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*
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* Licensed under the GPL-2.
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*/
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#include <linux/iio/events.h>
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#include <linux/iio/iio.h>
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#include <linux/kernel.h>
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#include "xilinx-xadc.h"
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static const struct iio_chan_spec *xadc_event_to_channel(
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struct iio_dev *indio_dev, unsigned int event)
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{
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switch (event) {
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case XADC_THRESHOLD_OT_MAX:
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case XADC_THRESHOLD_TEMP_MAX:
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return &indio_dev->channels[0];
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case XADC_THRESHOLD_VCCINT_MAX:
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case XADC_THRESHOLD_VCCAUX_MAX:
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return &indio_dev->channels[event];
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default:
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return &indio_dev->channels[event-1];
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}
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}
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static void xadc_handle_event(struct iio_dev *indio_dev, unsigned int event)
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{
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const struct iio_chan_spec *chan;
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/* Temperature threshold error, we don't handle this yet */
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if (event == 0)
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return;
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chan = xadc_event_to_channel(indio_dev, event);
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if (chan->type == IIO_TEMP) {
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/*
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* The temperature channel only supports over-temperature
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* events.
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*/
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iio_push_event(indio_dev,
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IIO_UNMOD_EVENT_CODE(chan->type, chan->channel,
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IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
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iio_get_time_ns());
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} else {
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/*
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* For other channels we don't know whether it is a upper or
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* lower threshold event. Userspace will have to check the
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* channel value if it wants to know.
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*/
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iio_push_event(indio_dev,
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IIO_UNMOD_EVENT_CODE(chan->type, chan->channel,
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IIO_EV_TYPE_THRESH, IIO_EV_DIR_EITHER),
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iio_get_time_ns());
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}
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}
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void xadc_handle_events(struct iio_dev *indio_dev, unsigned long events)
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{
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unsigned int i;
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for_each_set_bit(i, &events, 8)
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xadc_handle_event(indio_dev, i);
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}
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static unsigned xadc_get_threshold_offset(const struct iio_chan_spec *chan,
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enum iio_event_direction dir)
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{
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unsigned int offset;
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if (chan->type == IIO_TEMP) {
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offset = XADC_THRESHOLD_OT_MAX;
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} else {
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if (chan->channel < 2)
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offset = chan->channel + 1;
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else
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offset = chan->channel + 6;
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}
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if (dir == IIO_EV_DIR_FALLING)
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offset += 4;
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return offset;
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}
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static unsigned int xadc_get_alarm_mask(const struct iio_chan_spec *chan)
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{
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if (chan->type == IIO_TEMP) {
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return XADC_ALARM_OT_MASK;
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} else {
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switch (chan->channel) {
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case 0:
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return XADC_ALARM_VCCINT_MASK;
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case 1:
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return XADC_ALARM_VCCAUX_MASK;
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case 2:
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return XADC_ALARM_VCCBRAM_MASK;
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case 3:
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return XADC_ALARM_VCCPINT_MASK;
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case 4:
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return XADC_ALARM_VCCPAUX_MASK;
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case 5:
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return XADC_ALARM_VCCODDR_MASK;
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default:
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/* We will never get here */
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return 0;
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}
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}
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}
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int xadc_read_event_config(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, enum iio_event_type type,
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enum iio_event_direction dir)
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{
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struct xadc *xadc = iio_priv(indio_dev);
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return (bool)(xadc->alarm_mask & xadc_get_alarm_mask(chan));
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}
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int xadc_write_event_config(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, enum iio_event_type type,
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enum iio_event_direction dir, int state)
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{
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unsigned int alarm = xadc_get_alarm_mask(chan);
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struct xadc *xadc = iio_priv(indio_dev);
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uint16_t cfg, old_cfg;
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int ret;
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mutex_lock(&xadc->mutex);
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if (state)
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xadc->alarm_mask |= alarm;
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else
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xadc->alarm_mask &= ~alarm;
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xadc->ops->update_alarm(xadc, xadc->alarm_mask);
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ret = _xadc_read_adc_reg(xadc, XADC_REG_CONF1, &cfg);
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if (ret)
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goto err_out;
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old_cfg = cfg;
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cfg |= XADC_CONF1_ALARM_MASK;
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cfg &= ~((xadc->alarm_mask & 0xf0) << 4); /* bram, pint, paux, ddr */
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cfg &= ~((xadc->alarm_mask & 0x08) >> 3); /* ot */
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cfg &= ~((xadc->alarm_mask & 0x07) << 1); /* temp, vccint, vccaux */
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if (old_cfg != cfg)
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ret = _xadc_write_adc_reg(xadc, XADC_REG_CONF1, cfg);
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err_out:
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mutex_unlock(&xadc->mutex);
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return ret;
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}
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/* Register value is msb aligned, the lower 4 bits are ignored */
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#define XADC_THRESHOLD_VALUE_SHIFT 4
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int xadc_read_event_value(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, enum iio_event_type type,
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enum iio_event_direction dir, enum iio_event_info info,
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int *val, int *val2)
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{
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unsigned int offset = xadc_get_threshold_offset(chan, dir);
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struct xadc *xadc = iio_priv(indio_dev);
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switch (info) {
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case IIO_EV_INFO_VALUE:
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*val = xadc->threshold[offset];
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break;
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case IIO_EV_INFO_HYSTERESIS:
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*val = xadc->temp_hysteresis;
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break;
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default:
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return -EINVAL;
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}
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*val >>= XADC_THRESHOLD_VALUE_SHIFT;
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return IIO_VAL_INT;
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}
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int xadc_write_event_value(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, enum iio_event_type type,
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enum iio_event_direction dir, enum iio_event_info info,
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int val, int val2)
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{
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unsigned int offset = xadc_get_threshold_offset(chan, dir);
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struct xadc *xadc = iio_priv(indio_dev);
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int ret = 0;
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val <<= XADC_THRESHOLD_VALUE_SHIFT;
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if (val < 0 || val > 0xffff)
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return -EINVAL;
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mutex_lock(&xadc->mutex);
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switch (info) {
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case IIO_EV_INFO_VALUE:
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xadc->threshold[offset] = val;
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break;
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case IIO_EV_INFO_HYSTERESIS:
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xadc->temp_hysteresis = val;
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break;
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default:
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mutex_unlock(&xadc->mutex);
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return -EINVAL;
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}
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if (chan->type == IIO_TEMP) {
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/*
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* According to the datasheet we need to set the lower 4 bits to
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* 0x3, otherwise 125 degree celsius will be used as the
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* threshold.
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*/
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val |= 0x3;
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/*
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* Since we store the hysteresis as relative (to the threshold)
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* value, but the hardware expects an absolute value we need to
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* recalcualte this value whenever the hysteresis or the
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* threshold changes.
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*/
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if (xadc->threshold[offset] < xadc->temp_hysteresis)
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xadc->threshold[offset + 4] = 0;
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else
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xadc->threshold[offset + 4] = xadc->threshold[offset] -
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xadc->temp_hysteresis;
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ret = _xadc_write_adc_reg(xadc, XADC_REG_THRESHOLD(offset + 4),
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xadc->threshold[offset + 4]);
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if (ret)
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goto out_unlock;
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}
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if (info == IIO_EV_INFO_VALUE)
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ret = _xadc_write_adc_reg(xadc, XADC_REG_THRESHOLD(offset), val);
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out_unlock:
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mutex_unlock(&xadc->mutex);
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return ret;
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}
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