![Thomas Gleixner](/assets/img/avatar_default.png)
The function is broken in several ways: - The function does not wait for the init to complete. That can take quite some microseconds. - No protection against being called for two chips at the same time. SMP is such a new thing, right? Clear the start and the init done bit unconditionally and wait for both bits to be clear. In the enable path set the init bit and wait for the init done bit. Add proper locking. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
366 lines
9.1 KiB
C
366 lines
9.1 KiB
C
/*
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* Platform CAN bus driver for Bosch C_CAN controller
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*
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* Copyright (C) 2010 ST Microelectronics
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* Bhupesh Sharma <bhupesh.sharma@st.com>
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*
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* Borrowed heavily from the C_CAN driver originally written by:
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* Copyright (C) 2007
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* - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
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* - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
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*
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* Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B.
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* Bosch C_CAN user manual can be obtained from:
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* http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/
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* users_manual_c_can.pdf
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/if_arp.h>
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#include <linux/if_ether.h>
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#include <linux/list.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/can/dev.h>
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#include "c_can.h"
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#define CAN_RAMINIT_START_MASK(i) (0x001 << (i))
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#define CAN_RAMINIT_DONE_MASK(i) (0x100 << (i))
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#define CAN_RAMINIT_ALL_MASK(i) (0x101 << (i))
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static DEFINE_SPINLOCK(raminit_lock);
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/*
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* 16-bit c_can registers can be arranged differently in the memory
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* architecture of different implementations. For example: 16-bit
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* registers can be aligned to a 16-bit boundary or 32-bit boundary etc.
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* Handle the same by providing a common read/write interface.
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*/
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static u16 c_can_plat_read_reg_aligned_to_16bit(struct c_can_priv *priv,
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enum reg index)
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{
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return readw(priv->base + priv->regs[index]);
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}
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static void c_can_plat_write_reg_aligned_to_16bit(struct c_can_priv *priv,
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enum reg index, u16 val)
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{
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writew(val, priv->base + priv->regs[index]);
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}
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static u16 c_can_plat_read_reg_aligned_to_32bit(struct c_can_priv *priv,
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enum reg index)
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{
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return readw(priv->base + 2 * priv->regs[index]);
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}
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static void c_can_plat_write_reg_aligned_to_32bit(struct c_can_priv *priv,
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enum reg index, u16 val)
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{
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writew(val, priv->base + 2 * priv->regs[index]);
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}
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static void c_can_hw_raminit_wait(const struct c_can_priv *priv, u32 mask,
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u32 val)
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{
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/* We look only at the bits of our instance. */
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val &= mask;
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while ((readl(priv->raminit_ctrlreg) & mask) != val)
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udelay(1);
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}
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static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable)
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{
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u32 mask = CAN_RAMINIT_ALL_MASK(priv->instance);
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u32 ctrl;
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spin_lock(&raminit_lock);
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ctrl = readl(priv->raminit_ctrlreg);
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/* We clear the done and start bit first. The start bit is
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* looking at the 0 -> transition, but is not self clearing;
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* And we clear the init done bit as well.
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*/
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ctrl &= ~CAN_RAMINIT_START_MASK(priv->instance);
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ctrl |= CAN_RAMINIT_DONE_MASK(priv->instance);
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writel(ctrl, priv->raminit_ctrlreg);
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ctrl &= ~CAN_RAMINIT_DONE_MASK(priv->instance);
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c_can_hw_raminit_wait(priv, ctrl, mask);
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if (enable) {
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/* Set start bit and wait for the done bit. */
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ctrl |= CAN_RAMINIT_START_MASK(priv->instance);
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writel(ctrl, priv->raminit_ctrlreg);
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ctrl |= CAN_RAMINIT_DONE_MASK(priv->instance);
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c_can_hw_raminit_wait(priv, ctrl, mask);
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}
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spin_unlock(&raminit_lock);
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}
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static struct platform_device_id c_can_id_table[] = {
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[BOSCH_C_CAN_PLATFORM] = {
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.name = KBUILD_MODNAME,
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.driver_data = BOSCH_C_CAN,
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},
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[BOSCH_C_CAN] = {
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.name = "c_can",
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.driver_data = BOSCH_C_CAN,
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},
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[BOSCH_D_CAN] = {
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.name = "d_can",
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.driver_data = BOSCH_D_CAN,
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}, {
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}
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};
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MODULE_DEVICE_TABLE(platform, c_can_id_table);
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static const struct of_device_id c_can_of_table[] = {
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{ .compatible = "bosch,c_can", .data = &c_can_id_table[BOSCH_C_CAN] },
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{ .compatible = "bosch,d_can", .data = &c_can_id_table[BOSCH_D_CAN] },
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(of, c_can_of_table);
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static int c_can_plat_probe(struct platform_device *pdev)
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{
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int ret;
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void __iomem *addr;
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struct net_device *dev;
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struct c_can_priv *priv;
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const struct of_device_id *match;
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const struct platform_device_id *id;
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struct resource *mem, *res;
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int irq;
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struct clk *clk;
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if (pdev->dev.of_node) {
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match = of_match_device(c_can_of_table, &pdev->dev);
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if (!match) {
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dev_err(&pdev->dev, "Failed to find matching dt id\n");
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ret = -EINVAL;
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goto exit;
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}
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id = match->data;
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} else {
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id = platform_get_device_id(pdev);
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}
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/* get the appropriate clk */
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clk = clk_get(&pdev->dev, NULL);
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if (IS_ERR(clk)) {
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dev_err(&pdev->dev, "no clock defined\n");
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ret = -ENODEV;
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goto exit;
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}
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/* get the platform data */
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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irq = platform_get_irq(pdev, 0);
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if (!mem || irq <= 0) {
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ret = -ENODEV;
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goto exit_free_clk;
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}
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if (!request_mem_region(mem->start, resource_size(mem),
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KBUILD_MODNAME)) {
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dev_err(&pdev->dev, "resource unavailable\n");
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ret = -ENODEV;
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goto exit_free_clk;
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}
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addr = ioremap(mem->start, resource_size(mem));
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if (!addr) {
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dev_err(&pdev->dev, "failed to map can port\n");
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ret = -ENOMEM;
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goto exit_release_mem;
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}
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/* allocate the c_can device */
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dev = alloc_c_can_dev();
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if (!dev) {
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ret = -ENOMEM;
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goto exit_iounmap;
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}
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priv = netdev_priv(dev);
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switch (id->driver_data) {
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case BOSCH_C_CAN:
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priv->regs = reg_map_c_can;
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switch (mem->flags & IORESOURCE_MEM_TYPE_MASK) {
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case IORESOURCE_MEM_32BIT:
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priv->read_reg = c_can_plat_read_reg_aligned_to_32bit;
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priv->write_reg = c_can_plat_write_reg_aligned_to_32bit;
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break;
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case IORESOURCE_MEM_16BIT:
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default:
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priv->read_reg = c_can_plat_read_reg_aligned_to_16bit;
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priv->write_reg = c_can_plat_write_reg_aligned_to_16bit;
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break;
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}
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break;
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case BOSCH_D_CAN:
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priv->regs = reg_map_d_can;
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priv->can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES;
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priv->read_reg = c_can_plat_read_reg_aligned_to_16bit;
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priv->write_reg = c_can_plat_write_reg_aligned_to_16bit;
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if (pdev->dev.of_node)
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priv->instance = of_alias_get_id(pdev->dev.of_node, "d_can");
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else
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priv->instance = pdev->id;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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priv->raminit_ctrlreg = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(priv->raminit_ctrlreg) || (int)priv->instance < 0)
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dev_info(&pdev->dev, "control memory is not used for raminit\n");
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else
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priv->raminit = c_can_hw_raminit;
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break;
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default:
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ret = -EINVAL;
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goto exit_free_device;
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}
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dev->irq = irq;
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priv->base = addr;
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priv->device = &pdev->dev;
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priv->can.clock.freq = clk_get_rate(clk);
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priv->priv = clk;
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priv->type = id->driver_data;
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platform_set_drvdata(pdev, dev);
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SET_NETDEV_DEV(dev, &pdev->dev);
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ret = register_c_can_dev(dev);
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if (ret) {
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dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
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KBUILD_MODNAME, ret);
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goto exit_free_device;
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}
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dev_info(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n",
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KBUILD_MODNAME, priv->base, dev->irq);
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return 0;
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exit_free_device:
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free_c_can_dev(dev);
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exit_iounmap:
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iounmap(addr);
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exit_release_mem:
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release_mem_region(mem->start, resource_size(mem));
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exit_free_clk:
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clk_put(clk);
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exit:
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dev_err(&pdev->dev, "probe failed\n");
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return ret;
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}
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static int c_can_plat_remove(struct platform_device *pdev)
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{
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struct net_device *dev = platform_get_drvdata(pdev);
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struct c_can_priv *priv = netdev_priv(dev);
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struct resource *mem;
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unregister_c_can_dev(dev);
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free_c_can_dev(dev);
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iounmap(priv->base);
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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release_mem_region(mem->start, resource_size(mem));
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clk_put(priv->priv);
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return 0;
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}
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#ifdef CONFIG_PM
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static int c_can_suspend(struct platform_device *pdev, pm_message_t state)
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{
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int ret;
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struct net_device *ndev = platform_get_drvdata(pdev);
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struct c_can_priv *priv = netdev_priv(ndev);
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if (priv->type != BOSCH_D_CAN) {
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dev_warn(&pdev->dev, "Not supported\n");
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return 0;
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}
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if (netif_running(ndev)) {
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netif_stop_queue(ndev);
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netif_device_detach(ndev);
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}
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ret = c_can_power_down(ndev);
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if (ret) {
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netdev_err(ndev, "failed to enter power down mode\n");
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return ret;
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}
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priv->can.state = CAN_STATE_SLEEPING;
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return 0;
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}
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static int c_can_resume(struct platform_device *pdev)
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{
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int ret;
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struct net_device *ndev = platform_get_drvdata(pdev);
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struct c_can_priv *priv = netdev_priv(ndev);
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if (priv->type != BOSCH_D_CAN) {
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dev_warn(&pdev->dev, "Not supported\n");
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return 0;
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}
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ret = c_can_power_up(ndev);
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if (ret) {
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netdev_err(ndev, "Still in power down mode\n");
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return ret;
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}
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priv->can.state = CAN_STATE_ERROR_ACTIVE;
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if (netif_running(ndev)) {
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netif_device_attach(ndev);
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netif_start_queue(ndev);
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}
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return 0;
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}
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#else
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#define c_can_suspend NULL
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#define c_can_resume NULL
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#endif
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static struct platform_driver c_can_plat_driver = {
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.driver = {
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.name = KBUILD_MODNAME,
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.owner = THIS_MODULE,
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.of_match_table = c_can_of_table,
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},
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.probe = c_can_plat_probe,
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.remove = c_can_plat_remove,
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.suspend = c_can_suspend,
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.resume = c_can_resume,
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.id_table = c_can_id_table,
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};
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module_platform_driver(c_can_plat_driver);
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MODULE_AUTHOR("Bhupesh Sharma <bhupesh.sharma@st.com>");
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Platform CAN bus driver for Bosch C_CAN controller");
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