d2912cb15b
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
36 lines
1,000 B
C
36 lines
1,000 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2016-17 Synopsys, Inc. (www.synopsys.com)
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*/
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#ifndef __SOC_ARC_TIMERS_H
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#define __SOC_ARC_TIMERS_H
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#include <soc/arc/aux.h>
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/* Timer related Aux registers */
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#define ARC_REG_TIMER0_LIMIT 0x23 /* timer 0 limit */
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#define ARC_REG_TIMER0_CTRL 0x22 /* timer 0 control */
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#define ARC_REG_TIMER0_CNT 0x21 /* timer 0 count */
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#define ARC_REG_TIMER1_LIMIT 0x102 /* timer 1 limit */
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#define ARC_REG_TIMER1_CTRL 0x101 /* timer 1 control */
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#define ARC_REG_TIMER1_CNT 0x100 /* timer 1 count */
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/* CTRL reg bits */
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#define TIMER_CTRL_IE (1 << 0) /* Interrupt when Count reaches limit */
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#define TIMER_CTRL_NH (1 << 1) /* Count only when CPU NOT halted */
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#define ARC_TIMERN_MAX 0xFFFFFFFF
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#define ARC_REG_TIMERS_BCR 0x75
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struct bcr_timer {
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#ifdef CONFIG_CPU_BIG_ENDIAN
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unsigned int pad2:15, rtsc:1, pad1:5, rtc:1, t1:1, t0:1, ver:8;
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#else
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unsigned int ver:8, t0:1, t1:1, rtc:1, pad1:5, rtsc:1, pad2:15;
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#endif
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};
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#endif
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