b0504e39c2
The clkc has its registers in the range of the slcr. Instead of passing around the slcr base address pointer, let the clkc get the address from the DT. This prepares the slcr to be a real driver with multiple memory ranges (slcr, clocks, pinctrl,...) Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
31 lines
1.1 KiB
C
31 lines
1.1 KiB
C
/*
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* Copyright (C) 2013 Xilinx Inc.
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* Copyright (C) 2012 National Instruments
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __LINUX_CLK_ZYNQ_H_
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#define __LINUX_CLK_ZYNQ_H_
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#include <linux/spinlock.h>
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void zynq_clock_init(void);
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struct clk *clk_register_zynq_pll(const char *name, const char *parent,
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void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index,
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spinlock_t *lock);
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#endif
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