![Fenghua Yu](/assets/img/avatar_default.png)
The reserved bits (128~511) in the xsave header must be zero according to X86 SDM. Clear the bits in this patch. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Link: http://lkml.kernel.org/r/1401387164-43416-12-git-send-email-fenghua.yu@intel.com Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
641 lines
15 KiB
C
641 lines
15 KiB
C
/*
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* Copyright (C) 1994 Linus Torvalds
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*
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* Pentium III FXSR, SSE support
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* General FPU state handling cleanups
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* Gareth Hughes <gareth@valinux.com>, May 2000
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*/
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#include <linux/module.h>
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#include <linux/regset.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <asm/sigcontext.h>
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#include <asm/processor.h>
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#include <asm/math_emu.h>
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#include <asm/uaccess.h>
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#include <asm/ptrace.h>
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#include <asm/i387.h>
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#include <asm/fpu-internal.h>
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#include <asm/user.h>
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/*
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* Were we in an interrupt that interrupted kernel mode?
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*
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* On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
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* pair does nothing at all: the thread must not have fpu (so
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* that we don't try to save the FPU state), and TS must
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* be set (so that the clts/stts pair does nothing that is
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* visible in the interrupted kernel thread).
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*
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* Except for the eagerfpu case when we return 1 unless we've already
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* been eager and saved the state in kernel_fpu_begin().
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*/
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static inline bool interrupted_kernel_fpu_idle(void)
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{
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if (use_eager_fpu())
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return __thread_has_fpu(current);
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return !__thread_has_fpu(current) &&
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(read_cr0() & X86_CR0_TS);
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}
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/*
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* Were we in user mode (or vm86 mode) when we were
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* interrupted?
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*
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* Doing kernel_fpu_begin/end() is ok if we are running
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* in an interrupt context from user mode - we'll just
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* save the FPU state as required.
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*/
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static inline bool interrupted_user_mode(void)
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{
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struct pt_regs *regs = get_irq_regs();
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return regs && user_mode_vm(regs);
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}
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/*
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* Can we use the FPU in kernel mode with the
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* whole "kernel_fpu_begin/end()" sequence?
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*
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* It's always ok in process context (ie "not interrupt")
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* but it is sometimes ok even from an irq.
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*/
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bool irq_fpu_usable(void)
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{
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return !in_interrupt() ||
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interrupted_user_mode() ||
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interrupted_kernel_fpu_idle();
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}
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EXPORT_SYMBOL(irq_fpu_usable);
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void __kernel_fpu_begin(void)
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{
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struct task_struct *me = current;
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if (__thread_has_fpu(me)) {
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__thread_clear_has_fpu(me);
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__save_init_fpu(me);
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/* We do 'stts()' in __kernel_fpu_end() */
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} else if (!use_eager_fpu()) {
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this_cpu_write(fpu_owner_task, NULL);
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clts();
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}
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}
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EXPORT_SYMBOL(__kernel_fpu_begin);
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void __kernel_fpu_end(void)
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{
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if (use_eager_fpu()) {
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/*
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* For eager fpu, most the time, tsk_used_math() is true.
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* Restore the user math as we are done with the kernel usage.
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* At few instances during thread exit, signal handling etc,
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* tsk_used_math() is false. Those few places will take proper
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* actions, so we don't need to restore the math here.
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*/
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if (likely(tsk_used_math(current)))
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math_state_restore();
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} else {
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stts();
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}
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}
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EXPORT_SYMBOL(__kernel_fpu_end);
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void unlazy_fpu(struct task_struct *tsk)
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{
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preempt_disable();
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if (__thread_has_fpu(tsk)) {
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__save_init_fpu(tsk);
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__thread_fpu_end(tsk);
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} else
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tsk->thread.fpu_counter = 0;
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preempt_enable();
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}
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EXPORT_SYMBOL(unlazy_fpu);
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unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
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unsigned int xstate_size;
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EXPORT_SYMBOL_GPL(xstate_size);
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static struct i387_fxsave_struct fx_scratch;
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static void mxcsr_feature_mask_init(void)
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{
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unsigned long mask = 0;
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if (cpu_has_fxsr) {
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memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
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asm volatile("fxsave %0" : "+m" (fx_scratch));
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mask = fx_scratch.mxcsr_mask;
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if (mask == 0)
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mask = 0x0000ffbf;
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}
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mxcsr_feature_mask &= mask;
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}
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static void init_thread_xstate(void)
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{
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/*
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* Note that xstate_size might be overwriten later during
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* xsave_init().
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*/
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if (!cpu_has_fpu) {
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/*
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* Disable xsave as we do not support it if i387
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* emulation is enabled.
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*/
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setup_clear_cpu_cap(X86_FEATURE_XSAVE);
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setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
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xstate_size = sizeof(struct i387_soft_struct);
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return;
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}
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if (cpu_has_fxsr)
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xstate_size = sizeof(struct i387_fxsave_struct);
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else
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xstate_size = sizeof(struct i387_fsave_struct);
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}
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/*
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* Called at bootup to set up the initial FPU state that is later cloned
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* into all processes.
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*/
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void fpu_init(void)
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{
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unsigned long cr0;
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unsigned long cr4_mask = 0;
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#ifndef CONFIG_MATH_EMULATION
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if (!cpu_has_fpu) {
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pr_emerg("No FPU found and no math emulation present\n");
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pr_emerg("Giving up\n");
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for (;;)
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asm volatile("hlt");
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}
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#endif
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if (cpu_has_fxsr)
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cr4_mask |= X86_CR4_OSFXSR;
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if (cpu_has_xmm)
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cr4_mask |= X86_CR4_OSXMMEXCPT;
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if (cr4_mask)
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set_in_cr4(cr4_mask);
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cr0 = read_cr0();
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cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
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if (!cpu_has_fpu)
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cr0 |= X86_CR0_EM;
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write_cr0(cr0);
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/*
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* init_thread_xstate is only called once to avoid overriding
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* xstate_size during boot time or during CPU hotplug.
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*/
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if (xstate_size == 0)
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init_thread_xstate();
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mxcsr_feature_mask_init();
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xsave_init();
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eager_fpu_init();
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}
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void fpu_finit(struct fpu *fpu)
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{
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if (!cpu_has_fpu) {
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finit_soft_fpu(&fpu->state->soft);
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return;
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}
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if (cpu_has_fxsr) {
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fx_finit(&fpu->state->fxsave);
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} else {
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struct i387_fsave_struct *fp = &fpu->state->fsave;
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memset(fp, 0, xstate_size);
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fp->cwd = 0xffff037fu;
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fp->swd = 0xffff0000u;
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fp->twd = 0xffffffffu;
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fp->fos = 0xffff0000u;
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}
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}
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EXPORT_SYMBOL_GPL(fpu_finit);
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/*
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* The _current_ task is using the FPU for the first time
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* so initialize it and set the mxcsr to its default
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* value at reset if we support XMM instructions and then
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* remember the current task has used the FPU.
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*/
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int init_fpu(struct task_struct *tsk)
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{
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int ret;
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if (tsk_used_math(tsk)) {
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if (cpu_has_fpu && tsk == current)
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unlazy_fpu(tsk);
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tsk->thread.fpu.last_cpu = ~0;
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return 0;
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}
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/*
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* Memory allocation at the first usage of the FPU and other state.
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*/
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ret = fpu_alloc(&tsk->thread.fpu);
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if (ret)
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return ret;
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fpu_finit(&tsk->thread.fpu);
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set_stopped_child_used_math(tsk);
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return 0;
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}
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EXPORT_SYMBOL_GPL(init_fpu);
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/*
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* The xstateregs_active() routine is the same as the fpregs_active() routine,
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* as the "regset->n" for the xstate regset will be updated based on the feature
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* capabilites supported by the xsave.
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*/
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int fpregs_active(struct task_struct *target, const struct user_regset *regset)
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{
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return tsk_used_math(target) ? regset->n : 0;
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}
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int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
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{
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return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
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}
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int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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int ret;
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if (!cpu_has_fxsr)
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return -ENODEV;
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ret = init_fpu(target);
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if (ret)
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return ret;
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sanitize_i387_state(target);
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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&target->thread.fpu.state->fxsave, 0, -1);
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}
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int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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int ret;
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if (!cpu_has_fxsr)
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return -ENODEV;
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ret = init_fpu(target);
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if (ret)
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return ret;
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sanitize_i387_state(target);
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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&target->thread.fpu.state->fxsave, 0, -1);
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/*
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* mxcsr reserved bits must be masked to zero for security reasons.
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*/
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target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
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/*
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* update the header bits in the xsave header, indicating the
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* presence of FP and SSE state.
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*/
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if (cpu_has_xsave)
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target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
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return ret;
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}
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int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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int ret;
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if (!cpu_has_xsave)
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return -ENODEV;
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ret = init_fpu(target);
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if (ret)
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return ret;
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/*
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* Copy the 48bytes defined by the software first into the xstate
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* memory layout in the thread struct, so that we can copy the entire
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* xstateregs to the user using one user_regset_copyout().
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*/
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memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
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xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
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/*
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* Copy the xstate memory layout.
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*/
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ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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&target->thread.fpu.state->xsave, 0, -1);
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return ret;
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}
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int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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int ret;
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struct xsave_hdr_struct *xsave_hdr;
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if (!cpu_has_xsave)
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return -ENODEV;
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ret = init_fpu(target);
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if (ret)
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return ret;
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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&target->thread.fpu.state->xsave, 0, -1);
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/*
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* mxcsr reserved bits must be masked to zero for security reasons.
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*/
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target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
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xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
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xsave_hdr->xstate_bv &= pcntxt_mask;
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/*
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* These bits must be zero.
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*/
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memset(xsave_hdr->reserved, 0, 48);
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return ret;
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}
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#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
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/*
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* FPU tag word conversions.
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*/
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static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
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{
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unsigned int tmp; /* to avoid 16 bit prefixes in the code */
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/* Transform each pair of bits into 01 (valid) or 00 (empty) */
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tmp = ~twd;
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tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
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/* and move the valid bits to the lower byte. */
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tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
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tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
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tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
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return tmp;
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}
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#define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16)
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#define FP_EXP_TAG_VALID 0
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#define FP_EXP_TAG_ZERO 1
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#define FP_EXP_TAG_SPECIAL 2
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#define FP_EXP_TAG_EMPTY 3
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static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
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{
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struct _fpxreg *st;
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u32 tos = (fxsave->swd >> 11) & 7;
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u32 twd = (unsigned long) fxsave->twd;
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u32 tag;
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u32 ret = 0xffff0000u;
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int i;
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for (i = 0; i < 8; i++, twd >>= 1) {
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if (twd & 0x1) {
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st = FPREG_ADDR(fxsave, (i - tos) & 7);
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switch (st->exponent & 0x7fff) {
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case 0x7fff:
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tag = FP_EXP_TAG_SPECIAL;
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break;
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case 0x0000:
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if (!st->significand[0] &&
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!st->significand[1] &&
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!st->significand[2] &&
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!st->significand[3])
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tag = FP_EXP_TAG_ZERO;
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else
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tag = FP_EXP_TAG_SPECIAL;
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break;
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default:
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if (st->significand[3] & 0x8000)
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tag = FP_EXP_TAG_VALID;
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else
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tag = FP_EXP_TAG_SPECIAL;
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break;
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}
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} else {
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tag = FP_EXP_TAG_EMPTY;
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}
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ret |= tag << (2 * i);
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}
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return ret;
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}
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/*
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* FXSR floating point environment conversions.
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*/
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void
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convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
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{
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struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
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struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
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struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
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int i;
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env->cwd = fxsave->cwd | 0xffff0000u;
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env->swd = fxsave->swd | 0xffff0000u;
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env->twd = twd_fxsr_to_i387(fxsave);
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#ifdef CONFIG_X86_64
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env->fip = fxsave->rip;
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env->foo = fxsave->rdp;
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/*
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* should be actually ds/cs at fpu exception time, but
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* that information is not available in 64bit mode.
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*/
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env->fcs = task_pt_regs(tsk)->cs;
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if (tsk == current) {
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savesegment(ds, env->fos);
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} else {
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env->fos = tsk->thread.ds;
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}
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env->fos |= 0xffff0000;
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#else
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env->fip = fxsave->fip;
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env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
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env->foo = fxsave->foo;
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env->fos = fxsave->fos;
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#endif
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for (i = 0; i < 8; ++i)
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memcpy(&to[i], &from[i], sizeof(to[0]));
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}
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void convert_to_fxsr(struct task_struct *tsk,
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const struct user_i387_ia32_struct *env)
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{
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struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
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struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
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struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
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int i;
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fxsave->cwd = env->cwd;
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fxsave->swd = env->swd;
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fxsave->twd = twd_i387_to_fxsr(env->twd);
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fxsave->fop = (u16) ((u32) env->fcs >> 16);
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#ifdef CONFIG_X86_64
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fxsave->rip = env->fip;
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fxsave->rdp = env->foo;
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/* cs and ds ignored */
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#else
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|
fxsave->fip = env->fip;
|
|
fxsave->fcs = (env->fcs & 0xffff);
|
|
fxsave->foo = env->foo;
|
|
fxsave->fos = env->fos;
|
|
#endif
|
|
|
|
for (i = 0; i < 8; ++i)
|
|
memcpy(&to[i], &from[i], sizeof(from[0]));
|
|
}
|
|
|
|
int fpregs_get(struct task_struct *target, const struct user_regset *regset,
|
|
unsigned int pos, unsigned int count,
|
|
void *kbuf, void __user *ubuf)
|
|
{
|
|
struct user_i387_ia32_struct env;
|
|
int ret;
|
|
|
|
ret = init_fpu(target);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (!static_cpu_has(X86_FEATURE_FPU))
|
|
return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
|
|
|
|
if (!cpu_has_fxsr)
|
|
return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
|
|
&target->thread.fpu.state->fsave, 0,
|
|
-1);
|
|
|
|
sanitize_i387_state(target);
|
|
|
|
if (kbuf && pos == 0 && count == sizeof(env)) {
|
|
convert_from_fxsr(kbuf, target);
|
|
return 0;
|
|
}
|
|
|
|
convert_from_fxsr(&env, target);
|
|
|
|
return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
|
|
}
|
|
|
|
int fpregs_set(struct task_struct *target, const struct user_regset *regset,
|
|
unsigned int pos, unsigned int count,
|
|
const void *kbuf, const void __user *ubuf)
|
|
{
|
|
struct user_i387_ia32_struct env;
|
|
int ret;
|
|
|
|
ret = init_fpu(target);
|
|
if (ret)
|
|
return ret;
|
|
|
|
sanitize_i387_state(target);
|
|
|
|
if (!static_cpu_has(X86_FEATURE_FPU))
|
|
return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
|
|
|
|
if (!cpu_has_fxsr)
|
|
return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
|
|
&target->thread.fpu.state->fsave, 0,
|
|
-1);
|
|
|
|
if (pos > 0 || count < sizeof(env))
|
|
convert_from_fxsr(&env, target);
|
|
|
|
ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
|
|
if (!ret)
|
|
convert_to_fxsr(target, &env);
|
|
|
|
/*
|
|
* update the header bit in the xsave header, indicating the
|
|
* presence of FP.
|
|
*/
|
|
if (cpu_has_xsave)
|
|
target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* FPU state for core dumps.
|
|
* This is only used for a.out dumps now.
|
|
* It is declared generically using elf_fpregset_t (which is
|
|
* struct user_i387_struct) but is in fact only used for 32-bit
|
|
* dumps, so on 64-bit it is really struct user_i387_ia32_struct.
|
|
*/
|
|
int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
|
|
{
|
|
struct task_struct *tsk = current;
|
|
int fpvalid;
|
|
|
|
fpvalid = !!used_math();
|
|
if (fpvalid)
|
|
fpvalid = !fpregs_get(tsk, NULL,
|
|
0, sizeof(struct user_i387_ia32_struct),
|
|
fpu, NULL);
|
|
|
|
return fpvalid;
|
|
}
|
|
EXPORT_SYMBOL(dump_fpu);
|
|
|
|
#endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */
|
|
|
|
static int __init no_387(char *s)
|
|
{
|
|
setup_clear_cpu_cap(X86_FEATURE_FPU);
|
|
return 1;
|
|
}
|
|
|
|
__setup("no387", no_387);
|
|
|
|
void fpu_detect(struct cpuinfo_x86 *c)
|
|
{
|
|
unsigned long cr0;
|
|
u16 fsw, fcw;
|
|
|
|
fsw = fcw = 0xffff;
|
|
|
|
cr0 = read_cr0();
|
|
cr0 &= ~(X86_CR0_TS | X86_CR0_EM);
|
|
write_cr0(cr0);
|
|
|
|
asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
|
|
: "+m" (fsw), "+m" (fcw));
|
|
|
|
if (fsw == 0 && (fcw & 0x103f) == 0x003f)
|
|
set_cpu_cap(c, X86_FEATURE_FPU);
|
|
else
|
|
clear_cpu_cap(c, X86_FEATURE_FPU);
|
|
|
|
/* The final cr0 value is set in fpu_init() */
|
|
}
|