![Thomas Gleixner](/assets/img/avatar_default.png)
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: "David S. Miller" <davem@davemloft.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Karsten Keil <kkeil@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
690 lines
16 KiB
C
690 lines
16 KiB
C
/* $Id: gazel.c,v 2.19.2.4 2004/01/14 16:04:48 keil Exp $
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*
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* low level stuff for Gazel isdn cards
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*
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* Author BeWan Systems
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* based on source code from Karsten Keil
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* Copyright by BeWan Systems
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*
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* This software may be used and distributed according to the terms
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* of the GNU General Public License, incorporated herein by reference.
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*
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*/
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#include <linux/init.h>
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#include "hisax.h"
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#include "isac.h"
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#include "hscx.h"
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#include "isdnl1.h"
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#include "ipac.h"
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#include <linux/pci.h>
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extern const char *CardType[];
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static const char *gazel_revision = "$Revision: 2.19.2.4 $";
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#define R647 1
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#define R685 2
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#define R753 3
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#define R742 4
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#define PLX_CNTRL 0x50 /* registre de controle PLX */
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#define RESET_GAZEL 0x4
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#define RESET_9050 0x40000000
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#define PLX_INCSR 0x4C /* registre d'IT du 9050 */
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#define INT_ISAC_EN 0x8 /* 1 = enable IT isac */
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#define INT_ISAC 0x20 /* 1 = IT isac en cours */
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#define INT_HSCX_EN 0x1 /* 1 = enable IT hscx */
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#define INT_HSCX 0x4 /* 1 = IT hscx en cours */
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#define INT_PCI_EN 0x40 /* 1 = enable IT PCI */
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#define INT_IPAC_EN 0x3 /* enable IT ipac */
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#define byteout(addr,val) outb(val,addr)
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#define bytein(addr) inb(addr)
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static inline u_char
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readreg(unsigned int adr, u_short off)
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{
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return bytein(adr + off);
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}
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static inline void
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writereg(unsigned int adr, u_short off, u_char data)
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{
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byteout(adr + off, data);
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}
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static inline void
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read_fifo(unsigned int adr, u_char * data, int size)
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{
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insb(adr, data, size);
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}
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static void
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write_fifo(unsigned int adr, u_char * data, int size)
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{
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outsb(adr, data, size);
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}
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static inline u_char
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readreg_ipac(unsigned int adr, u_short off)
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{
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register u_char ret;
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byteout(adr, off);
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ret = bytein(adr + 4);
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return ret;
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}
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static inline void
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writereg_ipac(unsigned int adr, u_short off, u_char data)
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{
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byteout(adr, off);
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byteout(adr + 4, data);
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}
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static inline void
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read_fifo_ipac(unsigned int adr, u_short off, u_char * data, int size)
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{
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byteout(adr, off);
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insb(adr + 4, data, size);
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}
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static void
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write_fifo_ipac(unsigned int adr, u_short off, u_char * data, int size)
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{
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byteout(adr, off);
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outsb(adr + 4, data, size);
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}
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/* Interface functions */
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static u_char
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ReadISAC(struct IsdnCardState *cs, u_char offset)
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{
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u_short off2 = offset;
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switch (cs->subtyp) {
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case R647:
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off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
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case R685:
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return (readreg(cs->hw.gazel.isac, off2));
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case R753:
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case R742:
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return (readreg_ipac(cs->hw.gazel.ipac, 0x80 + off2));
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}
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return 0;
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}
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static void
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WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
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{
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u_short off2 = offset;
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switch (cs->subtyp) {
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case R647:
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off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
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case R685:
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writereg(cs->hw.gazel.isac, off2, value);
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break;
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case R753:
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case R742:
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writereg_ipac(cs->hw.gazel.ipac, 0x80 + off2, value);
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break;
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}
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}
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static void
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ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
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{
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switch (cs->subtyp) {
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case R647:
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case R685:
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read_fifo(cs->hw.gazel.isacfifo, data, size);
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break;
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case R753:
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case R742:
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read_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
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break;
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}
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}
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static void
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WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
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{
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switch (cs->subtyp) {
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case R647:
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case R685:
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write_fifo(cs->hw.gazel.isacfifo, data, size);
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break;
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case R753:
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case R742:
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write_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
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break;
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}
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}
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static void
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ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size)
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{
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switch (cs->subtyp) {
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case R647:
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case R685:
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read_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
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break;
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case R753:
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case R742:
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read_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
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break;
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}
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}
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static void
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WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size)
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{
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switch (cs->subtyp) {
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case R647:
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case R685:
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write_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
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break;
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case R753:
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case R742:
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write_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
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break;
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}
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}
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static u_char
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ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
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{
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u_short off2 = offset;
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switch (cs->subtyp) {
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case R647:
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off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
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case R685:
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return (readreg(cs->hw.gazel.hscx[hscx], off2));
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case R753:
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case R742:
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return (readreg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2));
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}
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return 0;
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}
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static void
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WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
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{
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u_short off2 = offset;
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switch (cs->subtyp) {
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case R647:
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off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
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case R685:
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writereg(cs->hw.gazel.hscx[hscx], off2, value);
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break;
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case R753:
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case R742:
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writereg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2, value);
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break;
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}
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}
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/*
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* fast interrupt HSCX stuff goes here
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*/
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#define READHSCX(cs, nr, reg) ReadHSCX(cs, nr, reg)
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#define WRITEHSCX(cs, nr, reg, data) WriteHSCX(cs, nr, reg, data)
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#define READHSCXFIFO(cs, nr, ptr, cnt) ReadHSCXfifo(cs, nr, ptr, cnt)
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#define WRITEHSCXFIFO(cs, nr, ptr, cnt) WriteHSCXfifo(cs, nr, ptr, cnt)
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#include "hscx_irq.c"
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static irqreturn_t
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gazel_interrupt(int intno, void *dev_id, struct pt_regs *regs)
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{
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#define MAXCOUNT 5
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struct IsdnCardState *cs = dev_id;
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u_char valisac, valhscx;
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int count = 0;
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u_long flags;
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spin_lock_irqsave(&cs->lock, flags);
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do {
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valhscx = ReadHSCX(cs, 1, HSCX_ISTA);
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if (valhscx)
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hscx_int_main(cs, valhscx);
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valisac = ReadISAC(cs, ISAC_ISTA);
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if (valisac)
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isac_interrupt(cs, valisac);
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count++;
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} while ((valhscx || valisac) && (count < MAXCOUNT));
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WriteHSCX(cs, 0, HSCX_MASK, 0xFF);
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WriteHSCX(cs, 1, HSCX_MASK, 0xFF);
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WriteISAC(cs, ISAC_MASK, 0xFF);
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WriteISAC(cs, ISAC_MASK, 0x0);
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WriteHSCX(cs, 0, HSCX_MASK, 0x0);
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WriteHSCX(cs, 1, HSCX_MASK, 0x0);
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spin_unlock_irqrestore(&cs->lock, flags);
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return IRQ_HANDLED;
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}
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static irqreturn_t
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gazel_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
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{
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struct IsdnCardState *cs = dev_id;
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u_char ista, val;
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int count = 0;
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u_long flags;
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spin_lock_irqsave(&cs->lock, flags);
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ista = ReadISAC(cs, IPAC_ISTA - 0x80);
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do {
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if (ista & 0x0f) {
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val = ReadHSCX(cs, 1, HSCX_ISTA);
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if (ista & 0x01)
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val |= 0x01;
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if (ista & 0x04)
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val |= 0x02;
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if (ista & 0x08)
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val |= 0x04;
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if (val) {
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hscx_int_main(cs, val);
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}
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}
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if (ista & 0x20) {
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val = 0xfe & ReadISAC(cs, ISAC_ISTA);
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if (val) {
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isac_interrupt(cs, val);
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}
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}
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if (ista & 0x10) {
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val = 0x01;
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isac_interrupt(cs, val);
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}
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ista = ReadISAC(cs, IPAC_ISTA - 0x80);
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count++;
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}
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while ((ista & 0x3f) && (count < MAXCOUNT));
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WriteISAC(cs, IPAC_MASK - 0x80, 0xFF);
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WriteISAC(cs, IPAC_MASK - 0x80, 0xC0);
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spin_unlock_irqrestore(&cs->lock, flags);
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return IRQ_HANDLED;
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}
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static void
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release_io_gazel(struct IsdnCardState *cs)
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{
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unsigned int i;
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switch (cs->subtyp) {
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case R647:
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for (i = 0x0000; i < 0xC000; i += 0x1000)
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release_region(i + cs->hw.gazel.hscx[0], 16);
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release_region(0xC000 + cs->hw.gazel.hscx[0], 1);
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break;
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case R685:
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release_region(cs->hw.gazel.hscx[0], 0x100);
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release_region(cs->hw.gazel.cfg_reg, 0x80);
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break;
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case R753:
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release_region(cs->hw.gazel.ipac, 0x8);
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release_region(cs->hw.gazel.cfg_reg, 0x80);
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break;
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case R742:
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release_region(cs->hw.gazel.ipac, 8);
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break;
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}
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}
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static int
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reset_gazel(struct IsdnCardState *cs)
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{
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unsigned long plxcntrl, addr = cs->hw.gazel.cfg_reg;
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switch (cs->subtyp) {
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case R647:
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writereg(addr, 0, 0);
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HZDELAY(10);
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writereg(addr, 0, 1);
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HZDELAY(2);
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break;
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case R685:
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plxcntrl = inl(addr + PLX_CNTRL);
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plxcntrl |= (RESET_9050 + RESET_GAZEL);
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outl(plxcntrl, addr + PLX_CNTRL);
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plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
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HZDELAY(4);
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outl(plxcntrl, addr + PLX_CNTRL);
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HZDELAY(10);
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outb(INT_ISAC_EN + INT_HSCX_EN + INT_PCI_EN, addr + PLX_INCSR);
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break;
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case R753:
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plxcntrl = inl(addr + PLX_CNTRL);
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plxcntrl |= (RESET_9050 + RESET_GAZEL);
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outl(plxcntrl, addr + PLX_CNTRL);
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plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
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WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
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HZDELAY(4);
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outl(plxcntrl, addr + PLX_CNTRL);
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HZDELAY(10);
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WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
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WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
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WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
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WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
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WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
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outb(INT_IPAC_EN + INT_PCI_EN, addr + PLX_INCSR);
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WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
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break;
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case R742:
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WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
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HZDELAY(4);
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WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
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WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
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WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
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WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
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WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
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WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
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break;
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}
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return (0);
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}
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static int
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Gazel_card_msg(struct IsdnCardState *cs, int mt, void *arg)
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{
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u_long flags;
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switch (mt) {
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case CARD_RESET:
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spin_lock_irqsave(&cs->lock, flags);
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reset_gazel(cs);
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spin_unlock_irqrestore(&cs->lock, flags);
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return (0);
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case CARD_RELEASE:
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release_io_gazel(cs);
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return (0);
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case CARD_INIT:
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spin_lock_irqsave(&cs->lock, flags);
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inithscxisac(cs, 1);
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if ((cs->subtyp==R647)||(cs->subtyp==R685)) {
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int i;
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for (i=0;i<(2+MAX_WAITING_CALLS);i++) {
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cs->bcs[i].hw.hscx.tsaxr0 = 0x1f;
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cs->bcs[i].hw.hscx.tsaxr1 = 0x23;
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}
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}
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spin_unlock_irqrestore(&cs->lock, flags);
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return (0);
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case CARD_TEST:
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return (0);
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}
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return (0);
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}
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static int
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reserve_regions(struct IsdnCard *card, struct IsdnCardState *cs)
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{
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unsigned int i, j, base = 0, adr = 0, len = 0;
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switch (cs->subtyp) {
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case R647:
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base = cs->hw.gazel.hscx[0];
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if (!request_region(adr = (0xC000 + base), len = 1, "gazel"))
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goto error;
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for (i = 0x0000; i < 0xC000; i += 0x1000) {
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if (!request_region(adr = (i + base), len = 16, "gazel"))
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goto error;
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}
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if (i != 0xC000) {
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for (j = 0; j < i; j+= 0x1000)
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release_region(j + base, 16);
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release_region(0xC000 + base, 1);
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goto error;
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}
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break;
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case R685:
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if (!request_region(adr = cs->hw.gazel.hscx[0], len = 0x100, "gazel"))
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goto error;
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if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
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release_region(cs->hw.gazel.hscx[0],0x100);
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goto error;
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}
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break;
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case R753:
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if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
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goto error;
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if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
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release_region(cs->hw.gazel.ipac, 8);
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goto error;
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}
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break;
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case R742:
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if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
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goto error;
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break;
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}
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return 0;
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error:
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printk(KERN_WARNING "Gazel: %s io ports 0x%x-0x%x already in use\n",
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CardType[cs->typ], adr, adr + len);
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return 1;
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}
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static int __init
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setup_gazelisa(struct IsdnCard *card, struct IsdnCardState *cs)
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{
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printk(KERN_INFO "Gazel: ISA PnP card automatic recognition\n");
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// we got an irq parameter, assume it is an ISA card
|
|
// R742 decodes address even in not started...
|
|
// R647 returns FF if not present or not started
|
|
// eventually needs improvment
|
|
if (readreg_ipac(card->para[1], IPAC_ID) == 1)
|
|
cs->subtyp = R742;
|
|
else
|
|
cs->subtyp = R647;
|
|
|
|
setup_isac(cs);
|
|
cs->hw.gazel.cfg_reg = card->para[1] + 0xC000;
|
|
cs->hw.gazel.ipac = card->para[1];
|
|
cs->hw.gazel.isac = card->para[1] + 0x8000;
|
|
cs->hw.gazel.hscx[0] = card->para[1];
|
|
cs->hw.gazel.hscx[1] = card->para[1] + 0x4000;
|
|
cs->irq = card->para[0];
|
|
cs->hw.gazel.isacfifo = cs->hw.gazel.isac;
|
|
cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0];
|
|
cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1];
|
|
|
|
switch (cs->subtyp) {
|
|
case R647:
|
|
printk(KERN_INFO "Gazel: Card ISA R647/R648 found\n");
|
|
cs->dc.isac.adf2 = 0x87;
|
|
printk(KERN_INFO
|
|
"Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
|
|
cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
|
|
printk(KERN_INFO
|
|
"Gazel: hscx A:0x%X hscx B:0x%X\n",
|
|
cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
|
|
|
|
break;
|
|
case R742:
|
|
printk(KERN_INFO "Gazel: Card ISA R742 found\n");
|
|
test_and_set_bit(HW_IPAC, &cs->HW_Flags);
|
|
printk(KERN_INFO
|
|
"Gazel: config irq:%d ipac:0x%X\n",
|
|
cs->irq, cs->hw.gazel.ipac);
|
|
break;
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
static struct pci_dev *dev_tel __initdata = NULL;
|
|
|
|
static int __init
|
|
setup_gazelpci(struct IsdnCardState *cs)
|
|
{
|
|
u_int pci_ioaddr0 = 0, pci_ioaddr1 = 0;
|
|
u_char pci_irq = 0, found;
|
|
u_int nbseek, seekcard;
|
|
|
|
printk(KERN_WARNING "Gazel: PCI card automatic recognition\n");
|
|
|
|
found = 0;
|
|
seekcard = PCI_DEVICE_ID_PLX_R685;
|
|
for (nbseek = 0; nbseek < 4; nbseek++) {
|
|
if ((dev_tel = pci_find_device(PCI_VENDOR_ID_PLX,
|
|
seekcard, dev_tel))) {
|
|
if (pci_enable_device(dev_tel))
|
|
return 1;
|
|
pci_irq = dev_tel->irq;
|
|
pci_ioaddr0 = pci_resource_start(dev_tel, 1);
|
|
pci_ioaddr1 = pci_resource_start(dev_tel, 2);
|
|
found = 1;
|
|
}
|
|
if (found)
|
|
break;
|
|
else {
|
|
switch (seekcard) {
|
|
case PCI_DEVICE_ID_PLX_R685:
|
|
seekcard = PCI_DEVICE_ID_PLX_R753;
|
|
break;
|
|
case PCI_DEVICE_ID_PLX_R753:
|
|
seekcard = PCI_DEVICE_ID_PLX_DJINN_ITOO;
|
|
break;
|
|
case PCI_DEVICE_ID_PLX_DJINN_ITOO:
|
|
seekcard = PCI_DEVICE_ID_PLX_OLITEC;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
if (!found) {
|
|
printk(KERN_WARNING "Gazel: No PCI card found\n");
|
|
return (1);
|
|
}
|
|
if (!pci_irq) {
|
|
printk(KERN_WARNING "Gazel: No IRQ for PCI card found\n");
|
|
return 1;
|
|
}
|
|
cs->hw.gazel.pciaddr[0] = pci_ioaddr0;
|
|
cs->hw.gazel.pciaddr[1] = pci_ioaddr1;
|
|
setup_isac(cs);
|
|
pci_ioaddr1 &= 0xfffe;
|
|
cs->hw.gazel.cfg_reg = pci_ioaddr0 & 0xfffe;
|
|
cs->hw.gazel.ipac = pci_ioaddr1;
|
|
cs->hw.gazel.isac = pci_ioaddr1 + 0x80;
|
|
cs->hw.gazel.hscx[0] = pci_ioaddr1;
|
|
cs->hw.gazel.hscx[1] = pci_ioaddr1 + 0x40;
|
|
cs->hw.gazel.isacfifo = cs->hw.gazel.isac;
|
|
cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0];
|
|
cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1];
|
|
cs->irq = pci_irq;
|
|
cs->irq_flags |= IRQF_SHARED;
|
|
|
|
switch (seekcard) {
|
|
case PCI_DEVICE_ID_PLX_R685:
|
|
printk(KERN_INFO "Gazel: Card PCI R685 found\n");
|
|
cs->subtyp = R685;
|
|
cs->dc.isac.adf2 = 0x87;
|
|
printk(KERN_INFO
|
|
"Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
|
|
cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
|
|
printk(KERN_INFO
|
|
"Gazel: hscx A:0x%X hscx B:0x%X\n",
|
|
cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
|
|
break;
|
|
case PCI_DEVICE_ID_PLX_R753:
|
|
case PCI_DEVICE_ID_PLX_DJINN_ITOO:
|
|
case PCI_DEVICE_ID_PLX_OLITEC:
|
|
printk(KERN_INFO "Gazel: Card PCI R753 found\n");
|
|
cs->subtyp = R753;
|
|
test_and_set_bit(HW_IPAC, &cs->HW_Flags);
|
|
printk(KERN_INFO
|
|
"Gazel: config irq:%d ipac:0x%X cfg:0x%X\n",
|
|
cs->irq, cs->hw.gazel.ipac, cs->hw.gazel.cfg_reg);
|
|
break;
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
int __init
|
|
setup_gazel(struct IsdnCard *card)
|
|
{
|
|
struct IsdnCardState *cs = card->cs;
|
|
char tmp[64];
|
|
u_char val;
|
|
|
|
strcpy(tmp, gazel_revision);
|
|
printk(KERN_INFO "Gazel: Driver Revision %s\n", HiSax_getrev(tmp));
|
|
|
|
if (cs->typ != ISDN_CTYPE_GAZEL)
|
|
return (0);
|
|
|
|
if (card->para[0]) {
|
|
if (setup_gazelisa(card, cs))
|
|
return (0);
|
|
} else {
|
|
|
|
#ifdef CONFIG_PCI
|
|
if (setup_gazelpci(cs))
|
|
return (0);
|
|
#else
|
|
printk(KERN_WARNING "Gazel: Card PCI requested and NO_PCI_BIOS, unable to config\n");
|
|
return (0);
|
|
#endif /* CONFIG_PCI */
|
|
}
|
|
|
|
if (reserve_regions(card, cs)) {
|
|
return (0);
|
|
}
|
|
if (reset_gazel(cs)) {
|
|
printk(KERN_WARNING "Gazel: wrong IRQ\n");
|
|
release_io_gazel(cs);
|
|
return (0);
|
|
}
|
|
cs->readisac = &ReadISAC;
|
|
cs->writeisac = &WriteISAC;
|
|
cs->readisacfifo = &ReadISACfifo;
|
|
cs->writeisacfifo = &WriteISACfifo;
|
|
cs->BC_Read_Reg = &ReadHSCX;
|
|
cs->BC_Write_Reg = &WriteHSCX;
|
|
cs->BC_Send_Data = &hscx_fill_fifo;
|
|
cs->cardmsg = &Gazel_card_msg;
|
|
|
|
switch (cs->subtyp) {
|
|
case R647:
|
|
case R685:
|
|
cs->irq_func = &gazel_interrupt;
|
|
ISACVersion(cs, "Gazel:");
|
|
if (HscxVersion(cs, "Gazel:")) {
|
|
printk(KERN_WARNING
|
|
"Gazel: wrong HSCX versions check IO address\n");
|
|
release_io_gazel(cs);
|
|
return (0);
|
|
}
|
|
break;
|
|
case R742:
|
|
case R753:
|
|
cs->irq_func = &gazel_interrupt_ipac;
|
|
val = ReadISAC(cs, IPAC_ID - 0x80);
|
|
printk(KERN_INFO "Gazel: IPAC version %x\n", val);
|
|
break;
|
|
}
|
|
|
|
return (1);
|
|
}
|