dc641b7319
The GPL header included in each file in the i40e driver doesn't need to include the "this program" text since this driver is already part of the larger kernel. Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
82 lines
2.7 KiB
C
82 lines
2.7 KiB
C
/*******************************************************************************
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*
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* Intel Ethernet Controller XL710 Family Linux Driver
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* Copyright(c) 2013 - 2014 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* The full GNU General Public License is included in this distribution in
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* the file called "COPYING".
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*
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* Contact Information:
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* e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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******************************************************************************/
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#ifndef _I40E_OSDEP_H_
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#define _I40E_OSDEP_H_
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#include <linux/types.h>
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#include <linux/if_ether.h>
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#include <linux/if_vlan.h>
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#include <linux/tcp.h>
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#include <linux/pci.h>
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#include <linux/highuid.h>
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/* get readq/writeq support for 32 bit kernels, use the low-first version */
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#include <asm-generic/io-64-nonatomic-lo-hi.h>
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/* File to be the magic between shared code and
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* actual OS primitives
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*/
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#define hw_dbg(hw, S, A...) do {} while (0)
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#define wr32(a, reg, value) writel((value), ((a)->hw_addr + (reg)))
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#define rd32(a, reg) readl((a)->hw_addr + (reg))
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#define wr64(a, reg, value) writeq((value), ((a)->hw_addr + (reg)))
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#define rd64(a, reg) readq((a)->hw_addr + (reg))
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#define i40e_flush(a) readl((a)->hw_addr + I40E_GLGEN_STAT)
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/* memory allocation tracking */
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struct i40e_dma_mem {
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void *va;
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dma_addr_t pa;
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u32 size;
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} __packed;
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#define i40e_allocate_dma_mem(h, m, unused, s, a) \
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i40e_allocate_dma_mem_d(h, m, s, a)
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#define i40e_free_dma_mem(h, m) i40e_free_dma_mem_d(h, m)
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struct i40e_virt_mem {
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void *va;
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u32 size;
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} __packed;
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#define i40e_allocate_virt_mem(h, m, s) i40e_allocate_virt_mem_d(h, m, s)
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#define i40e_free_virt_mem(h, m) i40e_free_virt_mem_d(h, m)
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#define i40e_debug(h, m, s, ...) \
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do { \
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if (((m) & (h)->debug_mask)) \
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pr_info("i40e %02x.%x " s, \
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(h)->bus.device, (h)->bus.func, \
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##__VA_ARGS__); \
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} while (0)
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typedef enum i40e_status_code i40e_status;
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#endif /* _I40E_OSDEP_H_ */
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