f7354ccac8
Now that thread_info is similar to task_struct, its address is in r2 so CURRENT_THREAD_INFO() macro is useless. This patch removes it. This patch also moves the 'tovirt(r2, r2)' down just before the reactivation of MMU translation, so that we keep the physical address of 'current' in r2 until then. It avoids a few calls to tophys(). At the same time, as the 'cpu' field is not anymore in thread_info, TI_CPU is renamed TASK_CPU by this patch. It also allows to get rid of a couple of '#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE' as ACCOUNT_CPU_USER_ENTRY() and ACCOUNT_CPU_USER_EXIT() are empty when CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not defined. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> [mpe: Fix a missed conversion of TI_CPU idle_6xx.S] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
52 lines
1 KiB
ArmAsm
52 lines
1 KiB
ArmAsm
/*
|
|
* Enter and leave sleep state on chips with 6xx-style HID0
|
|
* power management bits, which don't leave sleep state via reset.
|
|
*
|
|
* Author: Scott Wood <scottwood@freescale.com>
|
|
*
|
|
* Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of the GNU General Public License version 2 as published
|
|
* by the Free Software Foundation.
|
|
*/
|
|
|
|
#include <asm/ppc_asm.h>
|
|
#include <asm/reg.h>
|
|
#include <asm/thread_info.h>
|
|
#include <asm/asm-offsets.h>
|
|
|
|
_GLOBAL(mpc6xx_enter_standby)
|
|
mflr r4
|
|
|
|
mfspr r5, SPRN_HID0
|
|
rlwinm r5, r5, 0, ~(HID0_DOZE | HID0_NAP)
|
|
oris r5, r5, HID0_SLEEP@h
|
|
mtspr SPRN_HID0, r5
|
|
isync
|
|
|
|
lis r5, ret_from_standby@h
|
|
ori r5, r5, ret_from_standby@l
|
|
mtlr r5
|
|
|
|
lwz r6, TI_LOCAL_FLAGS(r2)
|
|
ori r6, r6, _TLF_SLEEPING
|
|
stw r6, TI_LOCAL_FLAGS(r2)
|
|
|
|
mfmsr r5
|
|
ori r5, r5, MSR_EE
|
|
oris r5, r5, MSR_POW@h
|
|
sync
|
|
mtmsr r5
|
|
isync
|
|
|
|
1: b 1b
|
|
|
|
ret_from_standby:
|
|
mfspr r5, SPRN_HID0
|
|
rlwinm r5, r5, 0, ~HID0_SLEEP
|
|
mtspr SPRN_HID0, r5
|
|
|
|
mtlr r4
|
|
blr
|