fb5d375d35
Some boards based on S3C6410 use synchronous clocking, which means that HCLKx2 and other system clocks are generated from APLL instead of MPLL. This patch adds support for such boards, by calculating hclk2 depending on the status of S3C_OTHERS_SYNCMUXSEL bit in S3C64XX_OTHERS regist Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
32 lines
860 B
C
32 lines
860 B
C
/* arch/arm/plat-s3c64xx/include/plat/regs-sys.h
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*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* S3C64XX system register definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __PLAT_REGS_SYS_H
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#define __PLAT_REGS_SYS_H __FILE__
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#define S3C_SYSREG(x) (S3C_VA_SYS + (x))
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#define S3C64XX_AHB_CON0 S3C_SYSREG(0x100)
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#define S3C64XX_AHB_CON1 S3C_SYSREG(0x104)
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#define S3C64XX_AHB_CON2 S3C_SYSREG(0x108)
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#define S3C64XX_SDMA_SEL S3C_SYSREG(0x110)
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#define S3C64XX_OTHERS S3C_SYSREG(0x900)
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#define S3C64XX_OTHERS_USBMASK (1 << 16)
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#define S3C64XX_OTHERS_SYNCMUXSEL (1 << 6)
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#endif /* _PLAT_REGS_SYS_H */
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