62e59c4e69
Now that we've gotten rid of clk_readl() we can remove io.h from the clk-provider header and push out the io.h include to any code that isn't already including the io.h header but using things like readl/writel, etc. Found with this grep: git grep -l clk-provider.h | grep '.c$' | xargs git grep -L 'linux/io.h' | \ xargs git grep -l \ -e '\<__iowrite32_copy\>' --or \ -e '\<__ioread32_copy\>' --or \ -e '\<__iowrite64_copy\>' --or \ -e '\<ioremap_page_range\>' --or \ -e '\<ioremap_huge_init\>' --or \ -e '\<arch_ioremap_pud_supported\>' --or \ -e '\<arch_ioremap_pmd_supported\>' --or \ -e '\<devm_ioport_map\>' --or \ -e '\<devm_ioport_unmap\>' --or \ -e '\<IOMEM_ERR_PTR\>' --or \ -e '\<devm_ioremap\>' --or \ -e '\<devm_ioremap_nocache\>' --or \ -e '\<devm_ioremap_wc\>' --or \ -e '\<devm_iounmap\>' --or \ -e '\<devm_ioremap_release\>' --or \ -e '\<devm_memremap\>' --or \ -e '\<devm_memunmap\>' --or \ -e '\<__devm_memremap_pages\>' --or \ -e '\<pci_remap_cfgspace\>' --or \ -e '\<arch_has_dev_port\>' --or \ -e '\<arch_phys_wc_add\>' --or \ -e '\<arch_phys_wc_del\>' --or \ -e '\<memremap\>' --or \ -e '\<memunmap\>' --or \ -e '\<arch_io_reserve_memtype_wc\>' --or \ -e '\<arch_io_free_memtype_wc\>' --or \ -e '\<__io_aw\>' --or \ -e '\<__io_pbw\>' --or \ -e '\<__io_paw\>' --or \ -e '\<__io_pbr\>' --or \ -e '\<__io_par\>' --or \ -e '\<__raw_readb\>' --or \ -e '\<__raw_readw\>' --or \ -e '\<__raw_readl\>' --or \ -e '\<__raw_readq\>' --or \ -e '\<__raw_writeb\>' --or \ -e '\<__raw_writew\>' --or \ -e '\<__raw_writel\>' --or \ -e '\<__raw_writeq\>' --or \ -e '\<readb\>' --or \ -e '\<readw\>' --or \ -e '\<readl\>' --or \ -e '\<readq\>' --or \ -e '\<writeb\>' --or \ -e '\<writew\>' --or \ -e '\<writel\>' --or \ -e '\<writeq\>' --or \ -e '\<readb_relaxed\>' --or \ -e '\<readw_relaxed\>' --or \ -e '\<readl_relaxed\>' --or \ -e '\<readq_relaxed\>' --or \ -e '\<writeb_relaxed\>' --or \ -e '\<writew_relaxed\>' --or \ -e '\<writel_relaxed\>' --or \ -e '\<writeq_relaxed\>' --or \ -e '\<readsb\>' --or \ -e '\<readsw\>' --or \ -e '\<readsl\>' --or \ -e '\<readsq\>' --or \ -e '\<writesb\>' --or \ -e '\<writesw\>' --or \ -e '\<writesl\>' --or \ -e '\<writesq\>' --or \ -e '\<inb\>' --or \ -e '\<inw\>' --or \ -e '\<inl\>' --or \ -e '\<outb\>' --or \ -e '\<outw\>' --or \ -e '\<outl\>' --or \ -e '\<inb_p\>' --or \ -e '\<inw_p\>' --or \ -e '\<inl_p\>' --or \ -e '\<outb_p\>' --or \ -e '\<outw_p\>' --or \ -e '\<outl_p\>' --or \ -e '\<insb\>' --or \ -e '\<insw\>' --or \ -e '\<insl\>' --or \ -e '\<outsb\>' --or \ -e '\<outsw\>' --or \ -e '\<outsl\>' --or \ -e '\<insb_p\>' --or \ -e '\<insw_p\>' --or \ -e '\<insl_p\>' --or \ -e '\<outsb_p\>' --or \ -e '\<outsw_p\>' --or \ -e '\<outsl_p\>' --or \ -e '\<ioread8\>' --or \ -e '\<ioread16\>' --or \ -e '\<ioread32\>' --or \ -e '\<ioread64\>' --or \ -e '\<iowrite8\>' --or \ -e '\<iowrite16\>' --or \ -e '\<iowrite32\>' --or \ -e '\<iowrite64\>' --or \ -e '\<ioread16be\>' --or \ -e '\<ioread32be\>' --or \ -e '\<ioread64be\>' --or \ -e '\<iowrite16be\>' --or \ -e '\<iowrite32be\>' --or \ -e '\<iowrite64be\>' --or \ -e '\<ioread8_rep\>' --or \ -e '\<ioread16_rep\>' --or \ -e '\<ioread32_rep\>' --or \ -e '\<ioread64_rep\>' --or \ -e '\<iowrite8_rep\>' --or \ -e '\<iowrite16_rep\>' --or \ -e '\<iowrite32_rep\>' --or \ -e '\<iowrite64_rep\>' --or \ -e '\<__io_virt\>' --or \ -e '\<pci_iounmap\>' --or \ -e '\<virt_to_phys\>' --or \ -e '\<phys_to_virt\>' --or \ -e '\<ioremap_uc\>' --or \ -e '\<ioremap\>' --or \ -e '\<__ioremap\>' --or \ -e '\<iounmap\>' --or \ -e '\<ioremap\>' --or \ -e '\<ioremap_nocache\>' --or \ -e '\<ioremap_uc\>' --or \ -e '\<ioremap_wc\>' --or \ -e '\<ioremap_wc\>' --or \ -e '\<ioremap_wt\>' --or \ -e '\<ioport_map\>' --or \ -e '\<ioport_unmap\>' --or \ -e '\<ioport_map\>' --or \ -e '\<ioport_unmap\>' --or \ -e '\<xlate_dev_kmem_ptr\>' --or \ -e '\<xlate_dev_mem_ptr\>' --or \ -e '\<unxlate_dev_mem_ptr\>' --or \ -e '\<virt_to_bus\>' --or \ -e '\<bus_to_virt\>' --or \ -e '\<memset_io\>' --or \ -e '\<memcpy_fromio\>' --or \ -e '\<memcpy_toio\>' I also reordered a couple includes when they weren't alphabetical and removed clk.h from kona, replacing it with clk-provider.h because that driver doesn't use clk consumer APIs. Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Tero Kristo <t-kristo@ti.com> Acked-by: Sekhar Nori <nsekhar@ti.com> Cc: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Mark Brown <broonie@kernel.org> Cc: Chris Zankel <chris@zankel.net> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: John Crispin <john@phrozen.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
180 lines
4 KiB
C
180 lines
4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2018 NXP
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*/
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#include <linux/clk-provider.h>
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#include <linux/errno.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include "clk.h"
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#define PCG_PREDIV_SHIFT 16
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#define PCG_PREDIV_WIDTH 3
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#define PCG_PREDIV_MAX 8
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#define PCG_DIV_SHIFT 0
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#define PCG_DIV_WIDTH 6
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#define PCG_DIV_MAX 64
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#define PCG_PCS_SHIFT 24
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#define PCG_PCS_MASK 0x7
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#define PCG_CGC_SHIFT 28
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static unsigned long imx8m_clk_composite_divider_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct clk_divider *divider = to_clk_divider(hw);
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unsigned long prediv_rate;
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unsigned int prediv_value;
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unsigned int div_value;
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prediv_value = readl(divider->reg) >> divider->shift;
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prediv_value &= clk_div_mask(divider->width);
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prediv_rate = divider_recalc_rate(hw, parent_rate, prediv_value,
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NULL, divider->flags,
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divider->width);
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div_value = readl(divider->reg) >> PCG_DIV_SHIFT;
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div_value &= clk_div_mask(PCG_DIV_WIDTH);
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return divider_recalc_rate(hw, prediv_rate, div_value, NULL,
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divider->flags, PCG_DIV_WIDTH);
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}
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static int imx8m_clk_composite_compute_dividers(unsigned long rate,
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unsigned long parent_rate,
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int *prediv, int *postdiv)
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{
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int div1, div2;
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int error = INT_MAX;
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int ret = -EINVAL;
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*prediv = 1;
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*postdiv = 1;
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for (div1 = 1; div1 <= PCG_PREDIV_MAX; div1++) {
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for (div2 = 1; div2 <= PCG_DIV_MAX; div2++) {
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int new_error = ((parent_rate / div1) / div2) - rate;
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if (abs(new_error) < abs(error)) {
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*prediv = div1;
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*postdiv = div2;
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error = new_error;
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ret = 0;
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}
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}
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}
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return ret;
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}
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static long imx8m_clk_composite_divider_round_rate(struct clk_hw *hw,
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unsigned long rate,
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unsigned long *prate)
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{
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int prediv_value;
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int div_value;
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imx8m_clk_composite_compute_dividers(rate, *prate,
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&prediv_value, &div_value);
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rate = DIV_ROUND_UP(*prate, prediv_value);
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return DIV_ROUND_UP(rate, div_value);
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}
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static int imx8m_clk_composite_divider_set_rate(struct clk_hw *hw,
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unsigned long rate,
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unsigned long parent_rate)
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{
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struct clk_divider *divider = to_clk_divider(hw);
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unsigned long flags = 0;
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int prediv_value;
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int div_value;
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int ret;
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u32 val;
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ret = imx8m_clk_composite_compute_dividers(rate, parent_rate,
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&prediv_value, &div_value);
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if (ret)
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return -EINVAL;
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spin_lock_irqsave(divider->lock, flags);
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val = readl(divider->reg);
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val &= ~((clk_div_mask(divider->width) << divider->shift) |
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(clk_div_mask(PCG_DIV_WIDTH) << PCG_DIV_SHIFT));
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val |= (u32)(prediv_value - 1) << divider->shift;
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val |= (u32)(div_value - 1) << PCG_DIV_SHIFT;
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writel(val, divider->reg);
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spin_unlock_irqrestore(divider->lock, flags);
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return ret;
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}
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static const struct clk_ops imx8m_clk_composite_divider_ops = {
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.recalc_rate = imx8m_clk_composite_divider_recalc_rate,
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.round_rate = imx8m_clk_composite_divider_round_rate,
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.set_rate = imx8m_clk_composite_divider_set_rate,
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};
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struct clk *imx8m_clk_composite_flags(const char *name,
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const char * const *parent_names,
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int num_parents, void __iomem *reg,
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unsigned long flags)
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{
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struct clk_hw *hw = ERR_PTR(-ENOMEM), *mux_hw;
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struct clk_hw *div_hw, *gate_hw;
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struct clk_divider *div = NULL;
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struct clk_gate *gate = NULL;
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struct clk_mux *mux = NULL;
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mux = kzalloc(sizeof(*mux), GFP_KERNEL);
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if (!mux)
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goto fail;
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mux_hw = &mux->hw;
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mux->reg = reg;
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mux->shift = PCG_PCS_SHIFT;
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mux->mask = PCG_PCS_MASK;
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div = kzalloc(sizeof(*div), GFP_KERNEL);
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if (!div)
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goto fail;
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div_hw = &div->hw;
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div->reg = reg;
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div->shift = PCG_PREDIV_SHIFT;
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div->width = PCG_PREDIV_WIDTH;
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div->lock = &imx_ccm_lock;
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div->flags = CLK_DIVIDER_ROUND_CLOSEST;
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gate = kzalloc(sizeof(*gate), GFP_KERNEL);
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if (!gate)
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goto fail;
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gate_hw = &gate->hw;
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gate->reg = reg;
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gate->bit_idx = PCG_CGC_SHIFT;
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hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,
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mux_hw, &clk_mux_ops, div_hw,
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&imx8m_clk_composite_divider_ops,
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gate_hw, &clk_gate_ops, flags);
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if (IS_ERR(hw))
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goto fail;
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return hw->clk;
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fail:
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kfree(gate);
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kfree(div);
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kfree(mux);
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return ERR_CAST(hw);
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}
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