243229b111
Add the clock tree definition for the new px30 SoC. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
26 lines
509 B
Makefile
26 lines
509 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# Rockchip Clock specific Makefile
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#
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obj-y += clk.o
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obj-y += clk-pll.o
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obj-y += clk-cpu.o
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obj-y += clk-half-divider.o
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obj-y += clk-inverter.o
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obj-y += clk-mmc-phase.o
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obj-y += clk-muxgrf.o
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obj-y += clk-ddr.o
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obj-$(CONFIG_RESET_CONTROLLER) += softrst.o
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obj-y += clk-px30.o
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obj-y += clk-rv1108.o
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obj-y += clk-rk3036.o
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obj-y += clk-rk3128.o
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obj-y += clk-rk3188.o
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obj-y += clk-rk3228.o
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obj-y += clk-rk3288.o
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obj-y += clk-rk3328.o
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obj-y += clk-rk3368.o
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obj-y += clk-rk3399.o
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