![Stephen Boyd](/assets/img/avatar_default.png)
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Cc: Chao Xie <chao.xie@marvell.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
513 lines
12 KiB
C
513 lines
12 KiB
C
/*
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* mmp mix(div and mux) clock operation source file
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*
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* Copyright (C) 2014 Marvell
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* Chao Xie <chao.xie@marvell.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/clk-provider.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include "clk.h"
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/*
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* The mix clock is a clock combined mux and div type clock.
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* Because the div field and mux field need to be set at same
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* time, we can not divide it into 2 types of clock
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*/
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#define to_clk_mix(hw) container_of(hw, struct mmp_clk_mix, hw)
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static unsigned int _get_maxdiv(struct mmp_clk_mix *mix)
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{
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unsigned int div_mask = (1 << mix->reg_info.width_div) - 1;
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unsigned int maxdiv = 0;
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struct clk_div_table *clkt;
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if (mix->div_flags & CLK_DIVIDER_ONE_BASED)
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return div_mask;
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if (mix->div_flags & CLK_DIVIDER_POWER_OF_TWO)
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return 1 << div_mask;
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if (mix->div_table) {
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for (clkt = mix->div_table; clkt->div; clkt++)
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if (clkt->div > maxdiv)
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maxdiv = clkt->div;
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return maxdiv;
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}
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return div_mask + 1;
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}
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static unsigned int _get_div(struct mmp_clk_mix *mix, unsigned int val)
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{
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struct clk_div_table *clkt;
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if (mix->div_flags & CLK_DIVIDER_ONE_BASED)
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return val;
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if (mix->div_flags & CLK_DIVIDER_POWER_OF_TWO)
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return 1 << val;
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if (mix->div_table) {
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for (clkt = mix->div_table; clkt->div; clkt++)
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if (clkt->val == val)
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return clkt->div;
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if (clkt->div == 0)
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return 0;
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}
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return val + 1;
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}
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static unsigned int _get_mux(struct mmp_clk_mix *mix, unsigned int val)
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{
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int num_parents = clk_hw_get_num_parents(&mix->hw);
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int i;
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if (mix->mux_flags & CLK_MUX_INDEX_BIT)
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return ffs(val) - 1;
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if (mix->mux_flags & CLK_MUX_INDEX_ONE)
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return val - 1;
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if (mix->mux_table) {
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for (i = 0; i < num_parents; i++)
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if (mix->mux_table[i] == val)
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return i;
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if (i == num_parents)
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return 0;
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}
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return val;
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}
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static unsigned int _get_div_val(struct mmp_clk_mix *mix, unsigned int div)
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{
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struct clk_div_table *clkt;
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if (mix->div_flags & CLK_DIVIDER_ONE_BASED)
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return div;
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if (mix->div_flags & CLK_DIVIDER_POWER_OF_TWO)
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return __ffs(div);
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if (mix->div_table) {
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for (clkt = mix->div_table; clkt->div; clkt++)
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if (clkt->div == div)
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return clkt->val;
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if (clkt->div == 0)
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return 0;
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}
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return div - 1;
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}
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static unsigned int _get_mux_val(struct mmp_clk_mix *mix, unsigned int mux)
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{
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if (mix->mux_table)
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return mix->mux_table[mux];
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return mux;
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}
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static void _filter_clk_table(struct mmp_clk_mix *mix,
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struct mmp_clk_mix_clk_table *table,
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unsigned int table_size)
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{
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int i;
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struct mmp_clk_mix_clk_table *item;
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struct clk_hw *parent, *hw;
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unsigned long parent_rate;
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hw = &mix->hw;
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for (i = 0; i < table_size; i++) {
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item = &table[i];
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parent = clk_hw_get_parent_by_index(hw, item->parent_index);
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parent_rate = clk_hw_get_rate(parent);
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if (parent_rate % item->rate) {
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item->valid = 0;
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} else {
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item->divisor = parent_rate / item->rate;
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item->valid = 1;
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}
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}
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}
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static int _set_rate(struct mmp_clk_mix *mix, u32 mux_val, u32 div_val,
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unsigned int change_mux, unsigned int change_div)
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{
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struct mmp_clk_mix_reg_info *ri = &mix->reg_info;
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u8 width, shift;
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u32 mux_div, fc_req;
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int ret, timeout = 50;
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unsigned long flags = 0;
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if (!change_mux && !change_div)
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return -EINVAL;
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if (mix->lock)
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spin_lock_irqsave(mix->lock, flags);
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if (mix->type == MMP_CLK_MIX_TYPE_V1
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|| mix->type == MMP_CLK_MIX_TYPE_V2)
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mux_div = readl(ri->reg_clk_ctrl);
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else
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mux_div = readl(ri->reg_clk_sel);
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if (change_div) {
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width = ri->width_div;
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shift = ri->shift_div;
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mux_div &= ~MMP_CLK_BITS_MASK(width, shift);
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mux_div |= MMP_CLK_BITS_SET_VAL(div_val, width, shift);
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}
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if (change_mux) {
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width = ri->width_mux;
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shift = ri->shift_mux;
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mux_div &= ~MMP_CLK_BITS_MASK(width, shift);
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mux_div |= MMP_CLK_BITS_SET_VAL(mux_val, width, shift);
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}
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if (mix->type == MMP_CLK_MIX_TYPE_V1) {
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writel(mux_div, ri->reg_clk_ctrl);
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} else if (mix->type == MMP_CLK_MIX_TYPE_V2) {
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mux_div |= (1 << ri->bit_fc);
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writel(mux_div, ri->reg_clk_ctrl);
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do {
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fc_req = readl(ri->reg_clk_ctrl);
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timeout--;
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if (!(fc_req & (1 << ri->bit_fc)))
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break;
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} while (timeout);
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if (timeout == 0) {
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pr_err("%s:%s cannot do frequency change\n",
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__func__, clk_hw_get_name(&mix->hw));
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ret = -EBUSY;
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goto error;
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}
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} else {
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fc_req = readl(ri->reg_clk_ctrl);
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fc_req |= 1 << ri->bit_fc;
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writel(fc_req, ri->reg_clk_ctrl);
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writel(mux_div, ri->reg_clk_sel);
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fc_req &= ~(1 << ri->bit_fc);
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}
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ret = 0;
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error:
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if (mix->lock)
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spin_unlock_irqrestore(mix->lock, flags);
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return ret;
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}
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static int mmp_clk_mix_determine_rate(struct clk_hw *hw,
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struct clk_rate_request *req)
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{
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struct mmp_clk_mix *mix = to_clk_mix(hw);
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struct mmp_clk_mix_clk_table *item;
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struct clk_hw *parent, *parent_best;
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unsigned long parent_rate, mix_rate, mix_rate_best, parent_rate_best;
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unsigned long gap, gap_best;
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u32 div_val_max;
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unsigned int div;
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int i, j;
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mix_rate_best = 0;
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parent_rate_best = 0;
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gap_best = ULONG_MAX;
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parent_best = NULL;
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if (mix->table) {
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for (i = 0; i < mix->table_size; i++) {
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item = &mix->table[i];
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if (item->valid == 0)
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continue;
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parent = clk_hw_get_parent_by_index(hw,
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item->parent_index);
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parent_rate = clk_hw_get_rate(parent);
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mix_rate = parent_rate / item->divisor;
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gap = abs(mix_rate - req->rate);
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if (parent_best == NULL || gap < gap_best) {
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parent_best = parent;
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parent_rate_best = parent_rate;
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mix_rate_best = mix_rate;
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gap_best = gap;
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if (gap_best == 0)
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goto found;
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}
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}
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} else {
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for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
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parent = clk_hw_get_parent_by_index(hw, i);
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parent_rate = clk_hw_get_rate(parent);
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div_val_max = _get_maxdiv(mix);
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for (j = 0; j < div_val_max; j++) {
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div = _get_div(mix, j);
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mix_rate = parent_rate / div;
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gap = abs(mix_rate - req->rate);
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if (parent_best == NULL || gap < gap_best) {
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parent_best = parent;
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parent_rate_best = parent_rate;
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mix_rate_best = mix_rate;
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gap_best = gap;
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if (gap_best == 0)
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goto found;
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}
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}
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}
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}
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found:
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if (!parent_best)
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return -EINVAL;
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req->best_parent_rate = parent_rate_best;
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req->best_parent_hw = parent_best;
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req->rate = mix_rate_best;
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return 0;
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}
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static int mmp_clk_mix_set_rate_and_parent(struct clk_hw *hw,
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unsigned long rate,
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unsigned long parent_rate,
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u8 index)
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{
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struct mmp_clk_mix *mix = to_clk_mix(hw);
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unsigned int div;
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u32 div_val, mux_val;
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div = parent_rate / rate;
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div_val = _get_div_val(mix, div);
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mux_val = _get_mux_val(mix, index);
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return _set_rate(mix, mux_val, div_val, 1, 1);
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}
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static u8 mmp_clk_mix_get_parent(struct clk_hw *hw)
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{
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struct mmp_clk_mix *mix = to_clk_mix(hw);
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struct mmp_clk_mix_reg_info *ri = &mix->reg_info;
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unsigned long flags = 0;
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u32 mux_div = 0;
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u8 width, shift;
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u32 mux_val;
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if (mix->lock)
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spin_lock_irqsave(mix->lock, flags);
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if (mix->type == MMP_CLK_MIX_TYPE_V1
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|| mix->type == MMP_CLK_MIX_TYPE_V2)
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mux_div = readl(ri->reg_clk_ctrl);
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else
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mux_div = readl(ri->reg_clk_sel);
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if (mix->lock)
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spin_unlock_irqrestore(mix->lock, flags);
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width = mix->reg_info.width_mux;
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shift = mix->reg_info.shift_mux;
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mux_val = MMP_CLK_BITS_GET_VAL(mux_div, width, shift);
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return _get_mux(mix, mux_val);
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}
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static unsigned long mmp_clk_mix_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct mmp_clk_mix *mix = to_clk_mix(hw);
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struct mmp_clk_mix_reg_info *ri = &mix->reg_info;
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unsigned long flags = 0;
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u32 mux_div = 0;
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u8 width, shift;
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unsigned int div;
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if (mix->lock)
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spin_lock_irqsave(mix->lock, flags);
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if (mix->type == MMP_CLK_MIX_TYPE_V1
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|| mix->type == MMP_CLK_MIX_TYPE_V2)
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mux_div = readl(ri->reg_clk_ctrl);
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else
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mux_div = readl(ri->reg_clk_sel);
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if (mix->lock)
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spin_unlock_irqrestore(mix->lock, flags);
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width = mix->reg_info.width_div;
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shift = mix->reg_info.shift_div;
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div = _get_div(mix, MMP_CLK_BITS_GET_VAL(mux_div, width, shift));
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return parent_rate / div;
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}
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static int mmp_clk_set_parent(struct clk_hw *hw, u8 index)
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{
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struct mmp_clk_mix *mix = to_clk_mix(hw);
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struct mmp_clk_mix_clk_table *item;
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int i;
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u32 div_val, mux_val;
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if (mix->table) {
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for (i = 0; i < mix->table_size; i++) {
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item = &mix->table[i];
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if (item->valid == 0)
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continue;
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if (item->parent_index == index)
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break;
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}
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if (i < mix->table_size) {
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div_val = _get_div_val(mix, item->divisor);
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mux_val = _get_mux_val(mix, item->parent_index);
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} else
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return -EINVAL;
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} else {
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mux_val = _get_mux_val(mix, index);
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div_val = 0;
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}
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return _set_rate(mix, mux_val, div_val, 1, div_val ? 1 : 0);
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}
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static int mmp_clk_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long best_parent_rate)
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{
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struct mmp_clk_mix *mix = to_clk_mix(hw);
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struct mmp_clk_mix_clk_table *item;
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unsigned long parent_rate;
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unsigned int best_divisor;
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struct clk_hw *parent;
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int i;
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best_divisor = best_parent_rate / rate;
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if (mix->table) {
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for (i = 0; i < mix->table_size; i++) {
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item = &mix->table[i];
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if (item->valid == 0)
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continue;
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parent = clk_hw_get_parent_by_index(hw,
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item->parent_index);
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parent_rate = clk_hw_get_rate(parent);
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if (parent_rate == best_parent_rate
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&& item->divisor == best_divisor)
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break;
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}
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if (i < mix->table_size)
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return _set_rate(mix,
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_get_mux_val(mix, item->parent_index),
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_get_div_val(mix, item->divisor),
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1, 1);
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else
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return -EINVAL;
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} else {
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for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
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parent = clk_hw_get_parent_by_index(hw, i);
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parent_rate = clk_hw_get_rate(parent);
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if (parent_rate == best_parent_rate)
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break;
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}
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if (i < clk_hw_get_num_parents(hw))
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return _set_rate(mix, _get_mux_val(mix, i),
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_get_div_val(mix, best_divisor), 1, 1);
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else
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return -EINVAL;
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}
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}
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static void mmp_clk_mix_init(struct clk_hw *hw)
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{
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struct mmp_clk_mix *mix = to_clk_mix(hw);
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if (mix->table)
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_filter_clk_table(mix, mix->table, mix->table_size);
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}
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const struct clk_ops mmp_clk_mix_ops = {
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.determine_rate = mmp_clk_mix_determine_rate,
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.set_rate_and_parent = mmp_clk_mix_set_rate_and_parent,
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.set_rate = mmp_clk_set_rate,
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.set_parent = mmp_clk_set_parent,
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.get_parent = mmp_clk_mix_get_parent,
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.recalc_rate = mmp_clk_mix_recalc_rate,
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.init = mmp_clk_mix_init,
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};
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struct clk *mmp_clk_register_mix(struct device *dev,
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const char *name,
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const char **parent_names,
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u8 num_parents,
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unsigned long flags,
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struct mmp_clk_mix_config *config,
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spinlock_t *lock)
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{
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struct mmp_clk_mix *mix;
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struct clk *clk;
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struct clk_init_data init;
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size_t table_bytes;
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mix = kzalloc(sizeof(*mix), GFP_KERNEL);
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if (!mix) {
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pr_err("%s:%s: could not allocate mmp mix clk\n",
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__func__, name);
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return ERR_PTR(-ENOMEM);
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}
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init.name = name;
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init.flags = flags | CLK_GET_RATE_NOCACHE;
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init.parent_names = parent_names;
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init.num_parents = num_parents;
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init.ops = &mmp_clk_mix_ops;
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memcpy(&mix->reg_info, &config->reg_info, sizeof(config->reg_info));
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if (config->table) {
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table_bytes = sizeof(*config->table) * config->table_size;
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mix->table = kmemdup(config->table, table_bytes, GFP_KERNEL);
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if (!mix->table) {
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pr_err("%s:%s: could not allocate mmp mix table\n",
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__func__, name);
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kfree(mix);
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return ERR_PTR(-ENOMEM);
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}
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mix->table_size = config->table_size;
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}
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if (config->mux_table) {
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table_bytes = sizeof(u32) * num_parents;
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mix->mux_table = kmemdup(config->mux_table, table_bytes,
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GFP_KERNEL);
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if (!mix->mux_table) {
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pr_err("%s:%s: could not allocate mmp mix mux-table\n",
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__func__, name);
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kfree(mix->table);
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kfree(mix);
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return ERR_PTR(-ENOMEM);
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}
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}
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mix->div_flags = config->div_flags;
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mix->mux_flags = config->mux_flags;
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mix->lock = lock;
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mix->hw.init = &init;
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if (config->reg_info.bit_fc >= 32)
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mix->type = MMP_CLK_MIX_TYPE_V1;
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else if (config->reg_info.reg_clk_sel)
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mix->type = MMP_CLK_MIX_TYPE_V3;
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else
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mix->type = MMP_CLK_MIX_TYPE_V2;
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clk = clk_register(dev, &mix->hw);
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|
|
|
if (IS_ERR(clk)) {
|
|
kfree(mix->mux_table);
|
|
kfree(mix->table);
|
|
kfree(mix);
|
|
}
|
|
|
|
return clk;
|
|
}
|