![Mauro Carvalho Chehab](/assets/img/avatar_default.png)
Move ancillary I2C drivers into drivers/media/i2c, in order to better organize them. Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
660 lines
15 KiB
C
660 lines
15 KiB
C
/*
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* saa7191.c - Philips SAA7191 video decoder driver
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*
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* Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
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* Copyright (C) 2004,2005 Mikael Nousiainen <tmnousia@cc.hut.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/major.h>
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/videodev2.h>
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#include <linux/i2c.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-chip-ident.h>
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#include "saa7191.h"
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#define SAA7191_MODULE_VERSION "0.0.5"
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MODULE_DESCRIPTION("Philips SAA7191 video decoder driver");
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MODULE_VERSION(SAA7191_MODULE_VERSION);
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MODULE_AUTHOR("Mikael Nousiainen <tmnousia@cc.hut.fi>");
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MODULE_LICENSE("GPL");
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// #define SAA7191_DEBUG
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#ifdef SAA7191_DEBUG
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#define dprintk(x...) printk("SAA7191: " x);
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#else
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#define dprintk(x...)
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#endif
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#define SAA7191_SYNC_COUNT 30
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#define SAA7191_SYNC_DELAY 100 /* milliseconds */
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struct saa7191 {
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struct v4l2_subdev sd;
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/* the register values are stored here as the actual
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* I2C-registers are write-only */
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u8 reg[25];
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int input;
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v4l2_std_id norm;
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};
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static inline struct saa7191 *to_saa7191(struct v4l2_subdev *sd)
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{
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return container_of(sd, struct saa7191, sd);
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}
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static const u8 initseq[] = {
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0, /* Subaddress */
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0x50, /* (0x50) SAA7191_REG_IDEL */
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/* 50 Hz signal timing */
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0x30, /* (0x30) SAA7191_REG_HSYB */
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0x00, /* (0x00) SAA7191_REG_HSYS */
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0xe8, /* (0xe8) SAA7191_REG_HCLB */
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0xb6, /* (0xb6) SAA7191_REG_HCLS */
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0xf4, /* (0xf4) SAA7191_REG_HPHI */
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/* control */
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SAA7191_LUMA_APER_1, /* (0x01) SAA7191_REG_LUMA - CVBS mode */
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0x00, /* (0x00) SAA7191_REG_HUEC */
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0xf8, /* (0xf8) SAA7191_REG_CKTQ */
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0xf8, /* (0xf8) SAA7191_REG_CKTS */
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0x90, /* (0x90) SAA7191_REG_PLSE */
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0x90, /* (0x90) SAA7191_REG_SESE */
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0x00, /* (0x00) SAA7191_REG_GAIN */
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SAA7191_STDC_NFEN | SAA7191_STDC_HRMV, /* (0x0c) SAA7191_REG_STDC
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* - not SECAM,
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* slow time constant */
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SAA7191_IOCK_OEDC | SAA7191_IOCK_OEHS | SAA7191_IOCK_OEVS
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| SAA7191_IOCK_OEDY, /* (0x78) SAA7191_REG_IOCK
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* - chroma from CVBS, GPSW1 & 2 off */
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SAA7191_CTL3_AUFD | SAA7191_CTL3_SCEN | SAA7191_CTL3_OFTS
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| SAA7191_CTL3_YDEL0, /* (0x99) SAA7191_REG_CTL3
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* - automatic field detection */
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0x00, /* (0x00) SAA7191_REG_CTL4 */
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0x2c, /* (0x2c) SAA7191_REG_CHCV - PAL nominal value */
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0x00, /* unused */
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0x00, /* unused */
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/* 60 Hz signal timing */
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0x34, /* (0x34) SAA7191_REG_HS6B */
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0x0a, /* (0x0a) SAA7191_REG_HS6S */
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0xf4, /* (0xf4) SAA7191_REG_HC6B */
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0xce, /* (0xce) SAA7191_REG_HC6S */
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0xf4, /* (0xf4) SAA7191_REG_HP6I */
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};
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/* SAA7191 register handling */
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static u8 saa7191_read_reg(struct v4l2_subdev *sd, u8 reg)
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{
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return to_saa7191(sd)->reg[reg];
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}
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static int saa7191_read_status(struct v4l2_subdev *sd, u8 *value)
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{
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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int ret;
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ret = i2c_master_recv(client, value, 1);
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if (ret < 0) {
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printk(KERN_ERR "SAA7191: saa7191_read_status(): read failed\n");
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return ret;
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}
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return 0;
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}
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static int saa7191_write_reg(struct v4l2_subdev *sd, u8 reg, u8 value)
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{
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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to_saa7191(sd)->reg[reg] = value;
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return i2c_smbus_write_byte_data(client, reg, value);
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}
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/* the first byte of data must be the first subaddress number (register) */
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static int saa7191_write_block(struct v4l2_subdev *sd,
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u8 length, const u8 *data)
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{
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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struct saa7191 *decoder = to_saa7191(sd);
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int i;
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int ret;
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for (i = 0; i < (length - 1); i++) {
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decoder->reg[data[0] + i] = data[i + 1];
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}
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ret = i2c_master_send(client, data, length);
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if (ret < 0) {
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printk(KERN_ERR "SAA7191: saa7191_write_block(): "
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"write failed\n");
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return ret;
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}
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return 0;
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}
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/* Helper functions */
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static int saa7191_s_routing(struct v4l2_subdev *sd,
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u32 input, u32 output, u32 config)
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{
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struct saa7191 *decoder = to_saa7191(sd);
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u8 luma = saa7191_read_reg(sd, SAA7191_REG_LUMA);
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u8 iock = saa7191_read_reg(sd, SAA7191_REG_IOCK);
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int err;
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switch (input) {
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case SAA7191_INPUT_COMPOSITE: /* Set Composite input */
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iock &= ~(SAA7191_IOCK_CHRS | SAA7191_IOCK_GPSW1
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| SAA7191_IOCK_GPSW2);
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/* Chrominance trap active */
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luma &= ~SAA7191_LUMA_BYPS;
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break;
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case SAA7191_INPUT_SVIDEO: /* Set S-Video input */
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iock |= SAA7191_IOCK_CHRS | SAA7191_IOCK_GPSW2;
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/* Chrominance trap bypassed */
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luma |= SAA7191_LUMA_BYPS;
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break;
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default:
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return -EINVAL;
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}
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err = saa7191_write_reg(sd, SAA7191_REG_LUMA, luma);
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if (err)
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return -EIO;
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err = saa7191_write_reg(sd, SAA7191_REG_IOCK, iock);
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if (err)
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return -EIO;
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decoder->input = input;
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return 0;
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}
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static int saa7191_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
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{
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struct saa7191 *decoder = to_saa7191(sd);
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u8 stdc = saa7191_read_reg(sd, SAA7191_REG_STDC);
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u8 ctl3 = saa7191_read_reg(sd, SAA7191_REG_CTL3);
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u8 chcv = saa7191_read_reg(sd, SAA7191_REG_CHCV);
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int err;
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if (norm & V4L2_STD_PAL) {
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stdc &= ~SAA7191_STDC_SECS;
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ctl3 &= ~(SAA7191_CTL3_AUFD | SAA7191_CTL3_FSEL);
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chcv = SAA7191_CHCV_PAL;
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} else if (norm & V4L2_STD_NTSC) {
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stdc &= ~SAA7191_STDC_SECS;
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ctl3 &= ~SAA7191_CTL3_AUFD;
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ctl3 |= SAA7191_CTL3_FSEL;
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chcv = SAA7191_CHCV_NTSC;
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} else if (norm & V4L2_STD_SECAM) {
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stdc |= SAA7191_STDC_SECS;
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ctl3 &= ~(SAA7191_CTL3_AUFD | SAA7191_CTL3_FSEL);
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chcv = SAA7191_CHCV_PAL;
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} else {
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return -EINVAL;
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}
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err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
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if (err)
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return -EIO;
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err = saa7191_write_reg(sd, SAA7191_REG_STDC, stdc);
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if (err)
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return -EIO;
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err = saa7191_write_reg(sd, SAA7191_REG_CHCV, chcv);
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if (err)
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return -EIO;
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decoder->norm = norm;
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dprintk("ctl3: %02x stdc: %02x chcv: %02x\n", ctl3,
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stdc, chcv);
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dprintk("norm: %llx\n", norm);
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return 0;
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}
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static int saa7191_wait_for_signal(struct v4l2_subdev *sd, u8 *status)
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{
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int i = 0;
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dprintk("Checking for signal...\n");
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for (i = 0; i < SAA7191_SYNC_COUNT; i++) {
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if (saa7191_read_status(sd, status))
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return -EIO;
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if (((*status) & SAA7191_STATUS_HLCK) == 0) {
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dprintk("Signal found\n");
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return 0;
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}
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msleep(SAA7191_SYNC_DELAY);
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}
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dprintk("No signal\n");
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return -EBUSY;
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}
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static int saa7191_querystd(struct v4l2_subdev *sd, v4l2_std_id *norm)
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{
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struct saa7191 *decoder = to_saa7191(sd);
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u8 stdc = saa7191_read_reg(sd, SAA7191_REG_STDC);
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u8 ctl3 = saa7191_read_reg(sd, SAA7191_REG_CTL3);
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u8 status;
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v4l2_std_id old_norm = decoder->norm;
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int err = 0;
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dprintk("SAA7191 extended signal auto-detection...\n");
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*norm = V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM;
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stdc &= ~SAA7191_STDC_SECS;
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ctl3 &= ~(SAA7191_CTL3_FSEL);
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err = saa7191_write_reg(sd, SAA7191_REG_STDC, stdc);
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if (err) {
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err = -EIO;
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goto out;
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}
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err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
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if (err) {
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err = -EIO;
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goto out;
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}
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ctl3 |= SAA7191_CTL3_AUFD;
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err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
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if (err) {
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err = -EIO;
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goto out;
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}
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msleep(SAA7191_SYNC_DELAY);
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err = saa7191_wait_for_signal(sd, &status);
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if (err)
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goto out;
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if (status & SAA7191_STATUS_FIDT) {
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/* 60Hz signal -> NTSC */
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dprintk("60Hz signal: NTSC\n");
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*norm = V4L2_STD_NTSC;
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return 0;
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}
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/* 50Hz signal */
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dprintk("50Hz signal: Trying PAL...\n");
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/* try PAL first */
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err = saa7191_s_std(sd, V4L2_STD_PAL);
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if (err)
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goto out;
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msleep(SAA7191_SYNC_DELAY);
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err = saa7191_wait_for_signal(sd, &status);
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if (err)
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goto out;
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/* not 50Hz ? */
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if (status & SAA7191_STATUS_FIDT) {
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dprintk("No 50Hz signal\n");
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saa7191_s_std(sd, old_norm);
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return -EAGAIN;
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}
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if (status & SAA7191_STATUS_CODE) {
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dprintk("PAL\n");
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*norm = V4L2_STD_PAL;
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return saa7191_s_std(sd, old_norm);
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}
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dprintk("No color detected with PAL - Trying SECAM...\n");
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/* no color detected ? -> try SECAM */
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err = saa7191_s_std(sd, V4L2_STD_SECAM);
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if (err)
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goto out;
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msleep(SAA7191_SYNC_DELAY);
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err = saa7191_wait_for_signal(sd, &status);
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if (err)
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goto out;
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/* not 50Hz ? */
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if (status & SAA7191_STATUS_FIDT) {
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dprintk("No 50Hz signal\n");
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err = -EAGAIN;
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goto out;
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}
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if (status & SAA7191_STATUS_CODE) {
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/* Color detected -> SECAM */
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dprintk("SECAM\n");
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*norm = V4L2_STD_SECAM;
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return saa7191_s_std(sd, old_norm);
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}
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dprintk("No color detected with SECAM - Going back to PAL.\n");
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out:
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return saa7191_s_std(sd, old_norm);
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}
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static int saa7191_autodetect_norm(struct v4l2_subdev *sd)
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{
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u8 status;
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dprintk("SAA7191 signal auto-detection...\n");
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dprintk("Reading status...\n");
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if (saa7191_read_status(sd, &status))
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return -EIO;
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dprintk("Checking for signal...\n");
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/* no signal ? */
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if (status & SAA7191_STATUS_HLCK) {
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dprintk("No signal\n");
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return -EBUSY;
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}
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dprintk("Signal found\n");
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if (status & SAA7191_STATUS_FIDT) {
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/* 60hz signal -> NTSC */
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dprintk("NTSC\n");
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return saa7191_s_std(sd, V4L2_STD_NTSC);
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} else {
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/* 50hz signal -> PAL */
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dprintk("PAL\n");
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return saa7191_s_std(sd, V4L2_STD_PAL);
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}
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}
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static int saa7191_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
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{
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u8 reg;
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int ret = 0;
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switch (ctrl->id) {
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case SAA7191_CONTROL_BANDPASS:
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case SAA7191_CONTROL_BANDPASS_WEIGHT:
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case SAA7191_CONTROL_CORING:
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reg = saa7191_read_reg(sd, SAA7191_REG_LUMA);
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switch (ctrl->id) {
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case SAA7191_CONTROL_BANDPASS:
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ctrl->value = ((s32)reg & SAA7191_LUMA_BPSS_MASK)
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>> SAA7191_LUMA_BPSS_SHIFT;
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break;
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case SAA7191_CONTROL_BANDPASS_WEIGHT:
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ctrl->value = ((s32)reg & SAA7191_LUMA_APER_MASK)
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>> SAA7191_LUMA_APER_SHIFT;
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break;
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case SAA7191_CONTROL_CORING:
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ctrl->value = ((s32)reg & SAA7191_LUMA_CORI_MASK)
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>> SAA7191_LUMA_CORI_SHIFT;
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break;
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}
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break;
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case SAA7191_CONTROL_FORCE_COLOUR:
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case SAA7191_CONTROL_CHROMA_GAIN:
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reg = saa7191_read_reg(sd, SAA7191_REG_GAIN);
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if (ctrl->id == SAA7191_CONTROL_FORCE_COLOUR)
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ctrl->value = ((s32)reg & SAA7191_GAIN_COLO) ? 1 : 0;
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else
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ctrl->value = ((s32)reg & SAA7191_GAIN_LFIS_MASK)
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>> SAA7191_GAIN_LFIS_SHIFT;
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break;
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case V4L2_CID_HUE:
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reg = saa7191_read_reg(sd, SAA7191_REG_HUEC);
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if (reg < 0x80)
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reg += 0x80;
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else
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reg -= 0x80;
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ctrl->value = (s32)reg;
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break;
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case SAA7191_CONTROL_VTRC:
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reg = saa7191_read_reg(sd, SAA7191_REG_STDC);
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ctrl->value = ((s32)reg & SAA7191_STDC_VTRC) ? 1 : 0;
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break;
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case SAA7191_CONTROL_LUMA_DELAY:
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reg = saa7191_read_reg(sd, SAA7191_REG_CTL3);
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ctrl->value = ((s32)reg & SAA7191_CTL3_YDEL_MASK)
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>> SAA7191_CTL3_YDEL_SHIFT;
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if (ctrl->value >= 4)
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ctrl->value -= 8;
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break;
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case SAA7191_CONTROL_VNR:
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reg = saa7191_read_reg(sd, SAA7191_REG_CTL4);
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ctrl->value = ((s32)reg & SAA7191_CTL4_VNOI_MASK)
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>> SAA7191_CTL4_VNOI_SHIFT;
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break;
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default:
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ret = -EINVAL;
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}
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return ret;
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}
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static int saa7191_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
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{
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u8 reg;
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int ret = 0;
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switch (ctrl->id) {
|
|
case SAA7191_CONTROL_BANDPASS:
|
|
case SAA7191_CONTROL_BANDPASS_WEIGHT:
|
|
case SAA7191_CONTROL_CORING:
|
|
reg = saa7191_read_reg(sd, SAA7191_REG_LUMA);
|
|
switch (ctrl->id) {
|
|
case SAA7191_CONTROL_BANDPASS:
|
|
reg &= ~SAA7191_LUMA_BPSS_MASK;
|
|
reg |= (ctrl->value << SAA7191_LUMA_BPSS_SHIFT)
|
|
& SAA7191_LUMA_BPSS_MASK;
|
|
break;
|
|
case SAA7191_CONTROL_BANDPASS_WEIGHT:
|
|
reg &= ~SAA7191_LUMA_APER_MASK;
|
|
reg |= (ctrl->value << SAA7191_LUMA_APER_SHIFT)
|
|
& SAA7191_LUMA_APER_MASK;
|
|
break;
|
|
case SAA7191_CONTROL_CORING:
|
|
reg &= ~SAA7191_LUMA_CORI_MASK;
|
|
reg |= (ctrl->value << SAA7191_LUMA_CORI_SHIFT)
|
|
& SAA7191_LUMA_CORI_MASK;
|
|
break;
|
|
}
|
|
ret = saa7191_write_reg(sd, SAA7191_REG_LUMA, reg);
|
|
break;
|
|
case SAA7191_CONTROL_FORCE_COLOUR:
|
|
case SAA7191_CONTROL_CHROMA_GAIN:
|
|
reg = saa7191_read_reg(sd, SAA7191_REG_GAIN);
|
|
if (ctrl->id == SAA7191_CONTROL_FORCE_COLOUR) {
|
|
if (ctrl->value)
|
|
reg |= SAA7191_GAIN_COLO;
|
|
else
|
|
reg &= ~SAA7191_GAIN_COLO;
|
|
} else {
|
|
reg &= ~SAA7191_GAIN_LFIS_MASK;
|
|
reg |= (ctrl->value << SAA7191_GAIN_LFIS_SHIFT)
|
|
& SAA7191_GAIN_LFIS_MASK;
|
|
}
|
|
ret = saa7191_write_reg(sd, SAA7191_REG_GAIN, reg);
|
|
break;
|
|
case V4L2_CID_HUE:
|
|
reg = ctrl->value & 0xff;
|
|
if (reg < 0x80)
|
|
reg += 0x80;
|
|
else
|
|
reg -= 0x80;
|
|
ret = saa7191_write_reg(sd, SAA7191_REG_HUEC, reg);
|
|
break;
|
|
case SAA7191_CONTROL_VTRC:
|
|
reg = saa7191_read_reg(sd, SAA7191_REG_STDC);
|
|
if (ctrl->value)
|
|
reg |= SAA7191_STDC_VTRC;
|
|
else
|
|
reg &= ~SAA7191_STDC_VTRC;
|
|
ret = saa7191_write_reg(sd, SAA7191_REG_STDC, reg);
|
|
break;
|
|
case SAA7191_CONTROL_LUMA_DELAY: {
|
|
s32 value = ctrl->value;
|
|
if (value < 0)
|
|
value += 8;
|
|
reg = saa7191_read_reg(sd, SAA7191_REG_CTL3);
|
|
reg &= ~SAA7191_CTL3_YDEL_MASK;
|
|
reg |= (value << SAA7191_CTL3_YDEL_SHIFT)
|
|
& SAA7191_CTL3_YDEL_MASK;
|
|
ret = saa7191_write_reg(sd, SAA7191_REG_CTL3, reg);
|
|
break;
|
|
}
|
|
case SAA7191_CONTROL_VNR:
|
|
reg = saa7191_read_reg(sd, SAA7191_REG_CTL4);
|
|
reg &= ~SAA7191_CTL4_VNOI_MASK;
|
|
reg |= (ctrl->value << SAA7191_CTL4_VNOI_SHIFT)
|
|
& SAA7191_CTL4_VNOI_MASK;
|
|
ret = saa7191_write_reg(sd, SAA7191_REG_CTL4, reg);
|
|
break;
|
|
default:
|
|
ret = -EINVAL;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/* I2C-interface */
|
|
|
|
static int saa7191_g_input_status(struct v4l2_subdev *sd, u32 *status)
|
|
{
|
|
u8 status_reg;
|
|
int res = V4L2_IN_ST_NO_SIGNAL;
|
|
|
|
if (saa7191_read_status(sd, &status_reg))
|
|
return -EIO;
|
|
if ((status_reg & SAA7191_STATUS_HLCK) == 0)
|
|
res = 0;
|
|
if (!(status_reg & SAA7191_STATUS_CODE))
|
|
res |= V4L2_IN_ST_NO_COLOR;
|
|
*status = res;
|
|
return 0;
|
|
}
|
|
|
|
|
|
static int saa7191_g_chip_ident(struct v4l2_subdev *sd,
|
|
struct v4l2_dbg_chip_ident *chip)
|
|
{
|
|
struct i2c_client *client = v4l2_get_subdevdata(sd);
|
|
|
|
return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_SAA7191, 0);
|
|
}
|
|
|
|
/* ----------------------------------------------------------------------- */
|
|
|
|
static const struct v4l2_subdev_core_ops saa7191_core_ops = {
|
|
.g_chip_ident = saa7191_g_chip_ident,
|
|
.g_ctrl = saa7191_g_ctrl,
|
|
.s_ctrl = saa7191_s_ctrl,
|
|
.s_std = saa7191_s_std,
|
|
};
|
|
|
|
static const struct v4l2_subdev_video_ops saa7191_video_ops = {
|
|
.s_routing = saa7191_s_routing,
|
|
.querystd = saa7191_querystd,
|
|
.g_input_status = saa7191_g_input_status,
|
|
};
|
|
|
|
static const struct v4l2_subdev_ops saa7191_ops = {
|
|
.core = &saa7191_core_ops,
|
|
.video = &saa7191_video_ops,
|
|
};
|
|
|
|
static int saa7191_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
int err = 0;
|
|
struct saa7191 *decoder;
|
|
struct v4l2_subdev *sd;
|
|
|
|
v4l_info(client, "chip found @ 0x%x (%s)\n",
|
|
client->addr << 1, client->adapter->name);
|
|
|
|
decoder = kzalloc(sizeof(*decoder), GFP_KERNEL);
|
|
if (!decoder)
|
|
return -ENOMEM;
|
|
|
|
sd = &decoder->sd;
|
|
v4l2_i2c_subdev_init(sd, client, &saa7191_ops);
|
|
|
|
err = saa7191_write_block(sd, sizeof(initseq), initseq);
|
|
if (err) {
|
|
printk(KERN_ERR "SAA7191 initialization failed\n");
|
|
kfree(decoder);
|
|
return err;
|
|
}
|
|
|
|
printk(KERN_INFO "SAA7191 initialized\n");
|
|
|
|
decoder->input = SAA7191_INPUT_COMPOSITE;
|
|
decoder->norm = V4L2_STD_PAL;
|
|
|
|
err = saa7191_autodetect_norm(sd);
|
|
if (err && (err != -EBUSY))
|
|
printk(KERN_ERR "SAA7191: Signal auto-detection failed\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int saa7191_remove(struct i2c_client *client)
|
|
{
|
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
|
|
v4l2_device_unregister_subdev(sd);
|
|
kfree(to_saa7191(sd));
|
|
return 0;
|
|
}
|
|
|
|
static const struct i2c_device_id saa7191_id[] = {
|
|
{ "saa7191", 0 },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, saa7191_id);
|
|
|
|
static struct i2c_driver saa7191_driver = {
|
|
.driver = {
|
|
.owner = THIS_MODULE,
|
|
.name = "saa7191",
|
|
},
|
|
.probe = saa7191_probe,
|
|
.remove = saa7191_remove,
|
|
.id_table = saa7191_id,
|
|
};
|
|
|
|
module_i2c_driver(saa7191_driver);
|