48 lines
1.2 KiB
C
48 lines
1.2 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_BW_H__
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#define __INTEL_BW_H__
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#include <drm/drm_atomic.h>
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#include "i915_drv.h"
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#include "intel_display.h"
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struct drm_i915_private;
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struct intel_atomic_state;
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struct intel_crtc_state;
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struct intel_bw_state {
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struct drm_private_state base;
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unsigned int data_rate[I915_MAX_PIPES];
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u8 num_active_planes[I915_MAX_PIPES];
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};
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#define to_intel_bw_state(x) container_of((x), struct intel_bw_state, base)
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static inline struct intel_bw_state *
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intel_atomic_get_bw_state(struct intel_atomic_state *state)
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{
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struct drm_i915_private *dev_priv = to_i915(state->base.dev);
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struct drm_private_state *bw_state;
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bw_state = drm_atomic_get_private_obj_state(&state->base,
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&dev_priv->bw_obj);
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if (IS_ERR(bw_state))
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return ERR_CAST(bw_state);
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return to_intel_bw_state(bw_state);
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}
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void intel_bw_init_hw(struct drm_i915_private *dev_priv);
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int intel_bw_init(struct drm_i915_private *dev_priv);
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int intel_bw_atomic_check(struct intel_atomic_state *state);
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void intel_bw_crtc_update(struct intel_bw_state *bw_state,
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const struct intel_crtc_state *crtc_state);
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#endif /* __INTEL_BW_H__ */
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