ba8a39820d
The Switchtec devices supports two PCIe Function Frameworks (PFFs) per upstream port (one for the port itself and one for the management endoint), and each PFF may have up to 255 ports. Previously the driver only supported 48 of those ports, and the SWITCHTEC_IOCTL_EVENT_SUMMARY ioctl only returned information about those 48. Increase SWITCHTEC_MAX_PFF_CSR from 48 to 255 so the driver supports all 255 possible ports. Rename SWITCHTEC_IOCTL_EVENT_SUMMARY and associated struct switchtec_ioctl_event_summary to SWITCHTEC_IOCTL_EVENT_SUMMARY_LEGACY and switchtec_ioctl_event_summary_legacy with so existing applications work unchanged, supporting up to 48 ports. Add replacement SWITCHTEC_IOCTL_EVENT_SUMMARY and struct switchtec_ioctl_event_summary that new and recompiled applications support up to 255 ports. Signed-off-by: Wesley Sheng <wesley.sheng@microchip.com> [bhelgaas: changelog] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Logan Gunthorpe <logang@deltatee.com>
149 lines
4.7 KiB
C
149 lines
4.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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* Microsemi Switchtec PCIe Driver
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* Copyright (c) 2017, Microsemi Corporation
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*/
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#ifndef _UAPI_LINUX_SWITCHTEC_IOCTL_H
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#define _UAPI_LINUX_SWITCHTEC_IOCTL_H
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#include <linux/types.h>
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#define SWITCHTEC_IOCTL_PART_CFG0 0
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#define SWITCHTEC_IOCTL_PART_CFG1 1
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#define SWITCHTEC_IOCTL_PART_IMG0 2
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#define SWITCHTEC_IOCTL_PART_IMG1 3
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#define SWITCHTEC_IOCTL_PART_NVLOG 4
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#define SWITCHTEC_IOCTL_PART_VENDOR0 5
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#define SWITCHTEC_IOCTL_PART_VENDOR1 6
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#define SWITCHTEC_IOCTL_PART_VENDOR2 7
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#define SWITCHTEC_IOCTL_PART_VENDOR3 8
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#define SWITCHTEC_IOCTL_PART_VENDOR4 9
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#define SWITCHTEC_IOCTL_PART_VENDOR5 10
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#define SWITCHTEC_IOCTL_PART_VENDOR6 11
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#define SWITCHTEC_IOCTL_PART_VENDOR7 12
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#define SWITCHTEC_IOCTL_NUM_PARTITIONS 13
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struct switchtec_ioctl_flash_info {
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__u64 flash_length;
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__u32 num_partitions;
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__u32 padding;
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};
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#define SWITCHTEC_IOCTL_PART_ACTIVE 1
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#define SWITCHTEC_IOCTL_PART_RUNNING 2
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struct switchtec_ioctl_flash_part_info {
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__u32 flash_partition;
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__u32 address;
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__u32 length;
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__u32 active;
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};
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struct switchtec_ioctl_event_summary_legacy {
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__u64 global;
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__u64 part_bitmap;
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__u32 local_part;
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__u32 padding;
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__u32 part[48];
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__u32 pff[48];
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};
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struct switchtec_ioctl_event_summary {
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__u64 global;
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__u64 part_bitmap;
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__u32 local_part;
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__u32 padding;
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__u32 part[48];
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__u32 pff[255];
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};
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#define SWITCHTEC_IOCTL_EVENT_STACK_ERROR 0
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#define SWITCHTEC_IOCTL_EVENT_PPU_ERROR 1
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#define SWITCHTEC_IOCTL_EVENT_ISP_ERROR 2
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#define SWITCHTEC_IOCTL_EVENT_SYS_RESET 3
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#define SWITCHTEC_IOCTL_EVENT_FW_EXC 4
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#define SWITCHTEC_IOCTL_EVENT_FW_NMI 5
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#define SWITCHTEC_IOCTL_EVENT_FW_NON_FATAL 6
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#define SWITCHTEC_IOCTL_EVENT_FW_FATAL 7
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#define SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP 8
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#define SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP_ASYNC 9
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#define SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP 10
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#define SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP_ASYNC 11
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#define SWITCHTEC_IOCTL_EVENT_GPIO_INT 12
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#define SWITCHTEC_IOCTL_EVENT_PART_RESET 13
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#define SWITCHTEC_IOCTL_EVENT_MRPC_COMP 14
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#define SWITCHTEC_IOCTL_EVENT_MRPC_COMP_ASYNC 15
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#define SWITCHTEC_IOCTL_EVENT_DYN_PART_BIND_COMP 16
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#define SWITCHTEC_IOCTL_EVENT_AER_IN_P2P 17
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#define SWITCHTEC_IOCTL_EVENT_AER_IN_VEP 18
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#define SWITCHTEC_IOCTL_EVENT_DPC 19
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#define SWITCHTEC_IOCTL_EVENT_CTS 20
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#define SWITCHTEC_IOCTL_EVENT_HOTPLUG 21
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#define SWITCHTEC_IOCTL_EVENT_IER 22
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#define SWITCHTEC_IOCTL_EVENT_THRESH 23
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#define SWITCHTEC_IOCTL_EVENT_POWER_MGMT 24
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#define SWITCHTEC_IOCTL_EVENT_TLP_THROTTLING 25
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#define SWITCHTEC_IOCTL_EVENT_FORCE_SPEED 26
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#define SWITCHTEC_IOCTL_EVENT_CREDIT_TIMEOUT 27
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#define SWITCHTEC_IOCTL_EVENT_LINK_STATE 28
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#define SWITCHTEC_IOCTL_EVENT_GFMS 29
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#define SWITCHTEC_IOCTL_MAX_EVENTS 30
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#define SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX -1
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#define SWITCHTEC_IOCTL_EVENT_IDX_ALL -2
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#define SWITCHTEC_IOCTL_EVENT_FLAG_CLEAR (1 << 0)
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#define SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL (1 << 1)
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#define SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG (1 << 2)
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#define SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI (1 << 3)
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#define SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL (1 << 4)
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#define SWITCHTEC_IOCTL_EVENT_FLAG_DIS_POLL (1 << 5)
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#define SWITCHTEC_IOCTL_EVENT_FLAG_DIS_LOG (1 << 6)
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#define SWITCHTEC_IOCTL_EVENT_FLAG_DIS_CLI (1 << 7)
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#define SWITCHTEC_IOCTL_EVENT_FLAG_DIS_FATAL (1 << 8)
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#define SWITCHTEC_IOCTL_EVENT_FLAG_UNUSED (~0x1ff)
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struct switchtec_ioctl_event_ctl {
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__u32 event_id;
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__s32 index;
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__u32 flags;
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__u32 occurred;
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__u32 count;
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__u32 data[5];
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};
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#define SWITCHTEC_IOCTL_PFF_VEP 100
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struct switchtec_ioctl_pff_port {
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__u32 pff;
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__u32 partition;
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__u32 port;
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};
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#define SWITCHTEC_IOCTL_FLASH_INFO \
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_IOR('W', 0x40, struct switchtec_ioctl_flash_info)
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#define SWITCHTEC_IOCTL_FLASH_PART_INFO \
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_IOWR('W', 0x41, struct switchtec_ioctl_flash_part_info)
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#define SWITCHTEC_IOCTL_EVENT_SUMMARY \
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_IOR('W', 0x42, struct switchtec_ioctl_event_summary)
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#define SWITCHTEC_IOCTL_EVENT_SUMMARY_LEGACY \
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_IOR('W', 0x42, struct switchtec_ioctl_event_summary_legacy)
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#define SWITCHTEC_IOCTL_EVENT_CTL \
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_IOWR('W', 0x43, struct switchtec_ioctl_event_ctl)
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#define SWITCHTEC_IOCTL_PFF_TO_PORT \
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_IOWR('W', 0x44, struct switchtec_ioctl_pff_port)
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#define SWITCHTEC_IOCTL_PORT_TO_PFF \
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_IOWR('W', 0x45, struct switchtec_ioctl_pff_port)
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#endif
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