e24c2d963a
After seeing, at best, "guesses" as to the following kind of information in several drivers, I decided that we really need a way for platforms to specifically give advice in this area for what works best with their PCI controller implementation. Basically, this new interface gives DMA bursting advice on PCI. There are three forms of the advice: 1) Burst as much as possible, it is not necessary to end bursts on some particular boundary for best performance. 2) Burst on some byte count multiple. A DMA burst to some multiple of number of bytes may be done, but it is important to end the burst on an exact multiple for best performance. The best example of this I am aware of are the PPC64 PCI controllers, where if you end a burst mid-cacheline then chip has to refetch the data and the IOMMU translations which hurts performance a lot. 3) Burst on a single byte count multiple. Bursts shall end exactly on the next multiple boundary for best performance. Sparc64 and Alpha's PCI controllers operate this way. They disconnect any device which tries to burst across a cacheline boundary. Actually, newer sparc64 PCI controllers do not have this behavior. That is why the "pdev" is passed into the interface, so I can add code later to check which PCI controller the system is using and give advice accordingly. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
150 lines
4 KiB
C
150 lines
4 KiB
C
#ifndef __x8664_PCI_H
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#define __x8664_PCI_H
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#include <linux/config.h>
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#include <asm/io.h>
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#ifdef __KERNEL__
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#include <linux/mm.h> /* for struct page */
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/* Can be used to override the logic in pci_scan_bus for skipping
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already-configured bus numbers - to be used for buggy BIOSes
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or architectures with incomplete PCI setup by the loader */
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#ifdef CONFIG_PCI
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extern unsigned int pcibios_assign_all_busses(void);
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#else
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#define pcibios_assign_all_busses() 0
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#endif
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#define pcibios_scan_all_fns(a, b) 0
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extern int no_iommu, force_iommu;
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extern unsigned long pci_mem_start;
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#define PCIBIOS_MIN_IO 0x1000
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#define PCIBIOS_MIN_MEM (pci_mem_start)
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#define PCIBIOS_MIN_CARDBUS_IO 0x4000
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void pcibios_config_init(void);
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struct pci_bus * pcibios_scan_root(int bus);
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extern int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value);
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extern int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value);
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void pcibios_set_master(struct pci_dev *dev);
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void pcibios_penalize_isa_irq(int irq);
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struct irq_routing_table *pcibios_get_irq_routing_table(void);
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int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq);
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <asm/scatterlist.h>
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#include <linux/string.h>
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#include <asm/page.h>
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extern int iommu_setup(char *opt);
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#ifdef CONFIG_GART_IOMMU
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/* The PCI address space does equal the physical memory
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* address space. The networking and block device layers use
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* this boolean for bounce buffer decisions
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*
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* On AMD64 it mostly equals, but we set it to zero to tell some subsystems
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* that an IOMMU is available.
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*/
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#define PCI_DMA_BUS_IS_PHYS (no_iommu ? 1 : 0)
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/*
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* x86-64 always supports DAC, but sometimes it is useful to force
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* devices through the IOMMU to get automatic sg list merging.
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* Optional right now.
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*/
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extern int iommu_sac_force;
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#define pci_dac_dma_supported(pci_dev, mask) (!iommu_sac_force)
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#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
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dma_addr_t ADDR_NAME;
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#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
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__u32 LEN_NAME;
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#define pci_unmap_addr(PTR, ADDR_NAME) \
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((PTR)->ADDR_NAME)
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#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
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(((PTR)->ADDR_NAME) = (VAL))
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#define pci_unmap_len(PTR, LEN_NAME) \
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((PTR)->LEN_NAME)
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#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
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(((PTR)->LEN_NAME) = (VAL))
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#else
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/* No IOMMU */
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#define PCI_DMA_BUS_IS_PHYS 1
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#define pci_dac_dma_supported(pci_dev, mask) 1
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#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
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#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
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#define pci_unmap_addr(PTR, ADDR_NAME) (0)
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#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
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#define pci_unmap_len(PTR, LEN_NAME) (0)
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#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
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#endif
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#include <asm-generic/pci-dma-compat.h>
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static inline dma64_addr_t
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pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page, unsigned long offset, int direction)
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{
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return ((dma64_addr_t) page_to_phys(page) +
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(dma64_addr_t) offset);
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}
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static inline struct page *
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pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr)
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{
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return virt_to_page(__va(dma_addr));
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}
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static inline unsigned long
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pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr)
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{
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return (dma_addr & ~PAGE_MASK);
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}
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static inline void
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pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
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{
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}
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static inline void
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pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
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{
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flush_write_buffers();
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}
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static inline void pci_dma_burst_advice(struct pci_dev *pdev,
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enum pci_dma_burst_strategy *strat,
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unsigned long *strategy_parameter)
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{
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*strat = PCI_DMA_BURST_INFINITY;
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*strategy_parameter = ~0UL;
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}
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#define HAVE_PCI_MMAP
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extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine);
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static inline void pcibios_add_platform_entries(struct pci_dev *dev)
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{
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}
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#endif /* __KERNEL__ */
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/* generic pci stuff */
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#ifdef CONFIG_PCI
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#include <asm-generic/pci.h>
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#endif
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#endif /* __x8664_PCI_H */
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