e2be04c7f9
Many user space API headers have licensing information, which is either
incomplete, badly formatted or just a shorthand for referring to the
license under which the file is supposed to be. This makes it hard for
compliance tools to determine the correct license.
Update these files with an SPDX license identifier. The identifier was
chosen based on the license information in the file.
GPL/LGPL licensed headers get the matching GPL/LGPL SPDX license
identifier with the added 'WITH Linux-syscall-note' exception, which is
the officially assigned exception identifier for the kernel syscall
exception:
NOTE! This copyright does *not* cover user programs that use kernel
services by normal system calls - this is merely considered normal use
of the kernel, and does *not* fall under the heading of "derived work".
This exception makes it possible to include GPL headers into non GPL
code, without confusing license compliance tools.
Headers which have either explicit dual licensing or are just licensed
under a non GPL license are updated with the corresponding SPDX
identifier and the GPLv2 with syscall exception identifier. The format
is:
((GPL-2.0 WITH Linux-syscall-note) OR SPDX-ID-OF-OTHER-LICENSE)
SPDX license identifiers are a legally binding shorthand, which can be
used instead of the full boiler plate text. The update does not remove
existing license information as this has to be done on a case by case
basis and the copyright holders might have to be consulted. This will
happen in a separate step.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne. See the previous patch in this series for the
methodology of how this patch was researched.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
243 lines
9.2 KiB
C
243 lines
9.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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* Copyright (C) 2015 Etnaviv Project
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ETNAVIV_DRM_H__
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#define __ETNAVIV_DRM_H__
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#include "drm.h"
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/* Please note that modifications to all structs defined here are
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* subject to backwards-compatibility constraints:
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* 1) Do not use pointers, use __u64 instead for 32 bit / 64 bit
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* user/kernel compatibility
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* 2) Keep fields aligned to their size
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* 3) Because of how drm_ioctl() works, we can add new fields at
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* the end of an ioctl if some care is taken: drm_ioctl() will
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* zero out the new fields at the tail of the ioctl, so a zero
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* value should have a backwards compatible meaning. And for
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* output params, userspace won't see the newly added output
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* fields.. so that has to be somehow ok.
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*/
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/* timeouts are specified in clock-monotonic absolute times (to simplify
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* restarting interrupted ioctls). The following struct is logically the
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* same as 'struct timespec' but 32/64b ABI safe.
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*/
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struct drm_etnaviv_timespec {
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__s64 tv_sec; /* seconds */
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__s64 tv_nsec; /* nanoseconds */
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};
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#define ETNAVIV_PARAM_GPU_MODEL 0x01
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#define ETNAVIV_PARAM_GPU_REVISION 0x02
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#define ETNAVIV_PARAM_GPU_FEATURES_0 0x03
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#define ETNAVIV_PARAM_GPU_FEATURES_1 0x04
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#define ETNAVIV_PARAM_GPU_FEATURES_2 0x05
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#define ETNAVIV_PARAM_GPU_FEATURES_3 0x06
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#define ETNAVIV_PARAM_GPU_FEATURES_4 0x07
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#define ETNAVIV_PARAM_GPU_FEATURES_5 0x08
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#define ETNAVIV_PARAM_GPU_FEATURES_6 0x09
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#define ETNAVIV_PARAM_GPU_STREAM_COUNT 0x10
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#define ETNAVIV_PARAM_GPU_REGISTER_MAX 0x11
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#define ETNAVIV_PARAM_GPU_THREAD_COUNT 0x12
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#define ETNAVIV_PARAM_GPU_VERTEX_CACHE_SIZE 0x13
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#define ETNAVIV_PARAM_GPU_SHADER_CORE_COUNT 0x14
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#define ETNAVIV_PARAM_GPU_PIXEL_PIPES 0x15
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#define ETNAVIV_PARAM_GPU_VERTEX_OUTPUT_BUFFER_SIZE 0x16
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#define ETNAVIV_PARAM_GPU_BUFFER_SIZE 0x17
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#define ETNAVIV_PARAM_GPU_INSTRUCTION_COUNT 0x18
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#define ETNAVIV_PARAM_GPU_NUM_CONSTANTS 0x19
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#define ETNAVIV_PARAM_GPU_NUM_VARYINGS 0x1a
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#define ETNA_MAX_PIPES 4
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struct drm_etnaviv_param {
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__u32 pipe; /* in */
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__u32 param; /* in, ETNAVIV_PARAM_x */
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__u64 value; /* out (get_param) or in (set_param) */
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};
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/*
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* GEM buffers:
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*/
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#define ETNA_BO_CACHE_MASK 0x000f0000
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/* cache modes */
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#define ETNA_BO_CACHED 0x00010000
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#define ETNA_BO_WC 0x00020000
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#define ETNA_BO_UNCACHED 0x00040000
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/* map flags */
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#define ETNA_BO_FORCE_MMU 0x00100000
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struct drm_etnaviv_gem_new {
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__u64 size; /* in */
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__u32 flags; /* in, mask of ETNA_BO_x */
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__u32 handle; /* out */
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};
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struct drm_etnaviv_gem_info {
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__u32 handle; /* in */
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__u32 pad;
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__u64 offset; /* out, offset to pass to mmap() */
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};
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#define ETNA_PREP_READ 0x01
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#define ETNA_PREP_WRITE 0x02
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#define ETNA_PREP_NOSYNC 0x04
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struct drm_etnaviv_gem_cpu_prep {
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__u32 handle; /* in */
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__u32 op; /* in, mask of ETNA_PREP_x */
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struct drm_etnaviv_timespec timeout; /* in */
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};
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struct drm_etnaviv_gem_cpu_fini {
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__u32 handle; /* in */
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__u32 flags; /* in, placeholder for now, no defined values */
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};
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/*
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* Cmdstream Submission:
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*/
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/* The value written into the cmdstream is logically:
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* relocbuf->gpuaddr + reloc_offset
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*
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* NOTE that reloc's must be sorted by order of increasing submit_offset,
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* otherwise EINVAL.
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*/
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struct drm_etnaviv_gem_submit_reloc {
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__u32 submit_offset; /* in, offset from submit_bo */
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__u32 reloc_idx; /* in, index of reloc_bo buffer */
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__u64 reloc_offset; /* in, offset from start of reloc_bo */
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__u32 flags; /* in, placeholder for now, no defined values */
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};
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/* Each buffer referenced elsewhere in the cmdstream submit (ie. the
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* cmdstream buffer(s) themselves or reloc entries) has one (and only
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* one) entry in the submit->bos[] table.
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*
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* As a optimization, the current buffer (gpu virtual address) can be
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* passed back through the 'presumed' field. If on a subsequent reloc,
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* userspace passes back a 'presumed' address that is still valid,
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* then patching the cmdstream for this entry is skipped. This can
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* avoid kernel needing to map/access the cmdstream bo in the common
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* case.
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*/
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#define ETNA_SUBMIT_BO_READ 0x0001
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#define ETNA_SUBMIT_BO_WRITE 0x0002
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struct drm_etnaviv_gem_submit_bo {
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__u32 flags; /* in, mask of ETNA_SUBMIT_BO_x */
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__u32 handle; /* in, GEM handle */
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__u64 presumed; /* in/out, presumed buffer address */
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};
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/* Each cmdstream submit consists of a table of buffers involved, and
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* one or more cmdstream buffers. This allows for conditional execution
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* (context-restore), and IB buffers needed for per tile/bin draw cmds.
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*/
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#define ETNA_SUBMIT_NO_IMPLICIT 0x0001
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#define ETNA_SUBMIT_FENCE_FD_IN 0x0002
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#define ETNA_SUBMIT_FENCE_FD_OUT 0x0004
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#define ETNA_SUBMIT_FLAGS (ETNA_SUBMIT_NO_IMPLICIT | \
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ETNA_SUBMIT_FENCE_FD_IN | \
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ETNA_SUBMIT_FENCE_FD_OUT)
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#define ETNA_PIPE_3D 0x00
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#define ETNA_PIPE_2D 0x01
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#define ETNA_PIPE_VG 0x02
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struct drm_etnaviv_gem_submit {
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__u32 fence; /* out */
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__u32 pipe; /* in */
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__u32 exec_state; /* in, initial execution state (ETNA_PIPE_x) */
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__u32 nr_bos; /* in, number of submit_bo's */
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__u32 nr_relocs; /* in, number of submit_reloc's */
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__u32 stream_size; /* in, cmdstream size */
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__u64 bos; /* in, ptr to array of submit_bo's */
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__u64 relocs; /* in, ptr to array of submit_reloc's */
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__u64 stream; /* in, ptr to cmdstream */
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__u32 flags; /* in, mask of ETNA_SUBMIT_x */
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__s32 fence_fd; /* in/out, fence fd (see ETNA_SUBMIT_FENCE_FD_x) */
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};
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/* The normal way to synchronize with the GPU is just to CPU_PREP on
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* a buffer if you need to access it from the CPU (other cmdstream
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* submission from same or other contexts, PAGE_FLIP ioctl, etc, all
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* handle the required synchronization under the hood). This ioctl
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* mainly just exists as a way to implement the gallium pipe_fence
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* APIs without requiring a dummy bo to synchronize on.
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*/
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#define ETNA_WAIT_NONBLOCK 0x01
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struct drm_etnaviv_wait_fence {
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__u32 pipe; /* in */
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__u32 fence; /* in */
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__u32 flags; /* in, mask of ETNA_WAIT_x */
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__u32 pad;
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struct drm_etnaviv_timespec timeout; /* in */
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};
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#define ETNA_USERPTR_READ 0x01
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#define ETNA_USERPTR_WRITE 0x02
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struct drm_etnaviv_gem_userptr {
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__u64 user_ptr; /* in, page aligned user pointer */
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__u64 user_size; /* in, page aligned user size */
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__u32 flags; /* in, flags */
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__u32 handle; /* out, non-zero handle */
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};
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struct drm_etnaviv_gem_wait {
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__u32 pipe; /* in */
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__u32 handle; /* in, bo to be waited for */
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__u32 flags; /* in, mask of ETNA_WAIT_x */
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__u32 pad;
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struct drm_etnaviv_timespec timeout; /* in */
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};
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#define DRM_ETNAVIV_GET_PARAM 0x00
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/* placeholder:
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#define DRM_ETNAVIV_SET_PARAM 0x01
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*/
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#define DRM_ETNAVIV_GEM_NEW 0x02
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#define DRM_ETNAVIV_GEM_INFO 0x03
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#define DRM_ETNAVIV_GEM_CPU_PREP 0x04
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#define DRM_ETNAVIV_GEM_CPU_FINI 0x05
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#define DRM_ETNAVIV_GEM_SUBMIT 0x06
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#define DRM_ETNAVIV_WAIT_FENCE 0x07
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#define DRM_ETNAVIV_GEM_USERPTR 0x08
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#define DRM_ETNAVIV_GEM_WAIT 0x09
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#define DRM_ETNAVIV_NUM_IOCTLS 0x0a
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#define DRM_IOCTL_ETNAVIV_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GET_PARAM, struct drm_etnaviv_param)
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#define DRM_IOCTL_ETNAVIV_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_NEW, struct drm_etnaviv_gem_new)
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#define DRM_IOCTL_ETNAVIV_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_INFO, struct drm_etnaviv_gem_info)
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#define DRM_IOCTL_ETNAVIV_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_CPU_PREP, struct drm_etnaviv_gem_cpu_prep)
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#define DRM_IOCTL_ETNAVIV_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_CPU_FINI, struct drm_etnaviv_gem_cpu_fini)
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#define DRM_IOCTL_ETNAVIV_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_SUBMIT, struct drm_etnaviv_gem_submit)
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#define DRM_IOCTL_ETNAVIV_WAIT_FENCE DRM_IOW(DRM_COMMAND_BASE + DRM_ETNAVIV_WAIT_FENCE, struct drm_etnaviv_wait_fence)
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#define DRM_IOCTL_ETNAVIV_GEM_USERPTR DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_USERPTR, struct drm_etnaviv_gem_userptr)
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#define DRM_IOCTL_ETNAVIV_GEM_WAIT DRM_IOW(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_WAIT, struct drm_etnaviv_gem_wait)
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ETNAVIV_DRM_H__ */
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