![Alex Deucher](/assets/img/avatar_default.png)
Document the VM functions in radeon_gart.c v2: adjust per Christian's suggestions v3: adjust to Christians's latest changes Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
969 lines
25 KiB
C
969 lines
25 KiB
C
/*
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* Copyright 2008 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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* Copyright 2009 Jerome Glisse.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alex Deucher
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* Jerome Glisse
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*/
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#include "drmP.h"
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#include "radeon_drm.h"
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#include "radeon.h"
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#include "radeon_reg.h"
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/*
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* GART
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* The GART (Graphics Aperture Remapping Table) is an aperture
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* in the GPU's address space. System pages can be mapped into
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* the aperture and look like contiguous pages from the GPU's
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* perspective. A page table maps the pages in the aperture
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* to the actual backing pages in system memory.
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*
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* Radeon GPUs support both an internal GART, as described above,
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* and AGP. AGP works similarly, but the GART table is configured
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* and maintained by the northbridge rather than the driver.
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* Radeon hw has a separate AGP aperture that is programmed to
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* point to the AGP aperture provided by the northbridge and the
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* requests are passed through to the northbridge aperture.
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* Both AGP and internal GART can be used at the same time, however
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* that is not currently supported by the driver.
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*
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* This file handles the common internal GART management.
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*/
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/*
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* Common GART table functions.
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*/
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/**
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* radeon_gart_table_ram_alloc - allocate system ram for gart page table
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*
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* @rdev: radeon_device pointer
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*
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* Allocate system memory for GART page table
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* (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
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* gart table to be in system memory.
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* Returns 0 for success, -ENOMEM for failure.
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*/
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int radeon_gart_table_ram_alloc(struct radeon_device *rdev)
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{
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void *ptr;
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ptr = pci_alloc_consistent(rdev->pdev, rdev->gart.table_size,
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&rdev->gart.table_addr);
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if (ptr == NULL) {
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return -ENOMEM;
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}
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#ifdef CONFIG_X86
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if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
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rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
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set_memory_uc((unsigned long)ptr,
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rdev->gart.table_size >> PAGE_SHIFT);
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}
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#endif
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rdev->gart.ptr = ptr;
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memset((void *)rdev->gart.ptr, 0, rdev->gart.table_size);
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return 0;
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}
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/**
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* radeon_gart_table_ram_free - free system ram for gart page table
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*
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* @rdev: radeon_device pointer
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*
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* Free system memory for GART page table
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* (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
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* gart table to be in system memory.
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*/
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void radeon_gart_table_ram_free(struct radeon_device *rdev)
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{
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if (rdev->gart.ptr == NULL) {
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return;
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}
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#ifdef CONFIG_X86
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if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
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rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
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set_memory_wb((unsigned long)rdev->gart.ptr,
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rdev->gart.table_size >> PAGE_SHIFT);
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}
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#endif
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pci_free_consistent(rdev->pdev, rdev->gart.table_size,
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(void *)rdev->gart.ptr,
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rdev->gart.table_addr);
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rdev->gart.ptr = NULL;
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rdev->gart.table_addr = 0;
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}
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/**
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* radeon_gart_table_vram_alloc - allocate vram for gart page table
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*
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* @rdev: radeon_device pointer
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*
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* Allocate video memory for GART page table
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* (pcie r4xx, r5xx+). These asics require the
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* gart table to be in video memory.
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* Returns 0 for success, error for failure.
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*/
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int radeon_gart_table_vram_alloc(struct radeon_device *rdev)
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{
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int r;
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if (rdev->gart.robj == NULL) {
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r = radeon_bo_create(rdev, rdev->gart.table_size,
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PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
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NULL, &rdev->gart.robj);
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if (r) {
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return r;
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}
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}
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return 0;
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}
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/**
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* radeon_gart_table_vram_pin - pin gart page table in vram
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*
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* @rdev: radeon_device pointer
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*
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* Pin the GART page table in vram so it will not be moved
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* by the memory manager (pcie r4xx, r5xx+). These asics require the
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* gart table to be in video memory.
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* Returns 0 for success, error for failure.
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*/
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int radeon_gart_table_vram_pin(struct radeon_device *rdev)
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{
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uint64_t gpu_addr;
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int r;
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r = radeon_bo_reserve(rdev->gart.robj, false);
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if (unlikely(r != 0))
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return r;
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r = radeon_bo_pin(rdev->gart.robj,
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RADEON_GEM_DOMAIN_VRAM, &gpu_addr);
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if (r) {
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radeon_bo_unreserve(rdev->gart.robj);
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return r;
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}
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r = radeon_bo_kmap(rdev->gart.robj, &rdev->gart.ptr);
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if (r)
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radeon_bo_unpin(rdev->gart.robj);
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radeon_bo_unreserve(rdev->gart.robj);
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rdev->gart.table_addr = gpu_addr;
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return r;
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}
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/**
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* radeon_gart_table_vram_unpin - unpin gart page table in vram
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*
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* @rdev: radeon_device pointer
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*
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* Unpin the GART page table in vram (pcie r4xx, r5xx+).
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* These asics require the gart table to be in video memory.
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*/
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void radeon_gart_table_vram_unpin(struct radeon_device *rdev)
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{
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int r;
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if (rdev->gart.robj == NULL) {
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return;
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}
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r = radeon_bo_reserve(rdev->gart.robj, false);
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if (likely(r == 0)) {
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radeon_bo_kunmap(rdev->gart.robj);
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radeon_bo_unpin(rdev->gart.robj);
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radeon_bo_unreserve(rdev->gart.robj);
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rdev->gart.ptr = NULL;
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}
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}
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/**
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* radeon_gart_table_vram_free - free gart page table vram
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*
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* @rdev: radeon_device pointer
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*
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* Free the video memory used for the GART page table
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* (pcie r4xx, r5xx+). These asics require the gart table to
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* be in video memory.
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*/
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void radeon_gart_table_vram_free(struct radeon_device *rdev)
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{
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if (rdev->gart.robj == NULL) {
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return;
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}
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radeon_gart_table_vram_unpin(rdev);
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radeon_bo_unref(&rdev->gart.robj);
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}
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/*
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* Common gart functions.
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*/
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/**
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* radeon_gart_unbind - unbind pages from the gart page table
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*
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* @rdev: radeon_device pointer
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* @offset: offset into the GPU's gart aperture
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* @pages: number of pages to unbind
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*
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* Unbinds the requested pages from the gart page table and
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* replaces them with the dummy page (all asics).
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*/
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void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
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int pages)
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{
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unsigned t;
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unsigned p;
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int i, j;
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u64 page_base;
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if (!rdev->gart.ready) {
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WARN(1, "trying to unbind memory from uninitialized GART !\n");
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return;
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}
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t = offset / RADEON_GPU_PAGE_SIZE;
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p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
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for (i = 0; i < pages; i++, p++) {
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if (rdev->gart.pages[p]) {
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rdev->gart.pages[p] = NULL;
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rdev->gart.pages_addr[p] = rdev->dummy_page.addr;
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page_base = rdev->gart.pages_addr[p];
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for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
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if (rdev->gart.ptr) {
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radeon_gart_set_page(rdev, t, page_base);
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}
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page_base += RADEON_GPU_PAGE_SIZE;
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}
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}
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}
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mb();
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radeon_gart_tlb_flush(rdev);
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}
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/**
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* radeon_gart_bind - bind pages into the gart page table
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*
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* @rdev: radeon_device pointer
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* @offset: offset into the GPU's gart aperture
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* @pages: number of pages to bind
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* @pagelist: pages to bind
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* @dma_addr: DMA addresses of pages
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*
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* Binds the requested pages to the gart page table
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* (all asics).
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* Returns 0 for success, -EINVAL for failure.
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*/
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int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
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int pages, struct page **pagelist, dma_addr_t *dma_addr)
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{
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unsigned t;
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unsigned p;
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uint64_t page_base;
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int i, j;
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if (!rdev->gart.ready) {
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WARN(1, "trying to bind memory to uninitialized GART !\n");
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return -EINVAL;
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}
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t = offset / RADEON_GPU_PAGE_SIZE;
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p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
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for (i = 0; i < pages; i++, p++) {
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rdev->gart.pages_addr[p] = dma_addr[i];
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rdev->gart.pages[p] = pagelist[i];
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if (rdev->gart.ptr) {
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page_base = rdev->gart.pages_addr[p];
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for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
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radeon_gart_set_page(rdev, t, page_base);
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page_base += RADEON_GPU_PAGE_SIZE;
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}
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}
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}
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mb();
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radeon_gart_tlb_flush(rdev);
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return 0;
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}
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/**
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* radeon_gart_restore - bind all pages in the gart page table
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*
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* @rdev: radeon_device pointer
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*
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* Binds all pages in the gart page table (all asics).
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* Used to rebuild the gart table on device startup or resume.
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*/
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void radeon_gart_restore(struct radeon_device *rdev)
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{
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int i, j, t;
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u64 page_base;
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if (!rdev->gart.ptr) {
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return;
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}
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for (i = 0, t = 0; i < rdev->gart.num_cpu_pages; i++) {
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page_base = rdev->gart.pages_addr[i];
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for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
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radeon_gart_set_page(rdev, t, page_base);
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page_base += RADEON_GPU_PAGE_SIZE;
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}
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}
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mb();
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radeon_gart_tlb_flush(rdev);
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}
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/**
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* radeon_gart_init - init the driver info for managing the gart
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*
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* @rdev: radeon_device pointer
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*
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* Allocate the dummy page and init the gart driver info (all asics).
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* Returns 0 for success, error for failure.
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*/
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int radeon_gart_init(struct radeon_device *rdev)
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{
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int r, i;
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if (rdev->gart.pages) {
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return 0;
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}
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/* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */
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if (PAGE_SIZE < RADEON_GPU_PAGE_SIZE) {
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DRM_ERROR("Page size is smaller than GPU page size!\n");
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return -EINVAL;
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}
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r = radeon_dummy_page_init(rdev);
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if (r)
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return r;
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/* Compute table size */
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rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE;
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rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE;
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DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
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rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages);
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/* Allocate pages table */
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rdev->gart.pages = kzalloc(sizeof(void *) * rdev->gart.num_cpu_pages,
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GFP_KERNEL);
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if (rdev->gart.pages == NULL) {
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radeon_gart_fini(rdev);
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return -ENOMEM;
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}
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rdev->gart.pages_addr = kzalloc(sizeof(dma_addr_t) *
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rdev->gart.num_cpu_pages, GFP_KERNEL);
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if (rdev->gart.pages_addr == NULL) {
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radeon_gart_fini(rdev);
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return -ENOMEM;
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}
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/* set GART entry to point to the dummy page by default */
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for (i = 0; i < rdev->gart.num_cpu_pages; i++) {
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rdev->gart.pages_addr[i] = rdev->dummy_page.addr;
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}
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return 0;
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}
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/**
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* radeon_gart_fini - tear down the driver info for managing the gart
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*
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* @rdev: radeon_device pointer
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*
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* Tear down the gart driver info and free the dummy page (all asics).
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*/
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void radeon_gart_fini(struct radeon_device *rdev)
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{
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if (rdev->gart.pages && rdev->gart.pages_addr && rdev->gart.ready) {
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/* unbind pages */
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radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages);
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}
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rdev->gart.ready = false;
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kfree(rdev->gart.pages);
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kfree(rdev->gart.pages_addr);
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rdev->gart.pages = NULL;
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rdev->gart.pages_addr = NULL;
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radeon_dummy_page_fini(rdev);
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}
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/*
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* GPUVM
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* GPUVM is similar to the legacy gart on older asics, however
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* rather than there being a single global gart table
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* for the entire GPU, there are multiple VM page tables active
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* at any given time. The VM page tables can contain a mix
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* vram pages and system memory pages and system memory pages
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* can be mapped as snooped (cached system pages) or unsnooped
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* (uncached system pages).
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* Each VM has an ID associated with it and there is a page table
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* associated with each VMID. When execting a command buffer,
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* the kernel tells the the ring what VMID to use for that command
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* buffer. VMIDs are allocated dynamically as commands are submitted.
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* The userspace drivers maintain their own address space and the kernel
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* sets up their pages tables accordingly when they submit their
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* command buffers and a VMID is assigned.
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* Cayman/Trinity support up to 8 active VMs at any given time;
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* SI supports 16.
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*/
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/*
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* vm helpers
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*
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* TODO bind a default page at vm initialization for default address
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*/
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/**
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* radeon_vm_manager_init - init the vm manager
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*
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* @rdev: radeon_device pointer
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*
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* Init the vm manager (cayman+).
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* Returns 0 for success, error for failure.
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*/
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int radeon_vm_manager_init(struct radeon_device *rdev)
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{
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struct radeon_vm *vm;
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struct radeon_bo_va *bo_va;
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int r;
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if (!rdev->vm_manager.enabled) {
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/* mark first vm as always in use, it's the system one */
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r = radeon_sa_bo_manager_init(rdev, &rdev->vm_manager.sa_manager,
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rdev->vm_manager.max_pfn * 8,
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RADEON_GEM_DOMAIN_VRAM);
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if (r) {
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dev_err(rdev->dev, "failed to allocate vm bo (%dKB)\n",
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(rdev->vm_manager.max_pfn * 8) >> 10);
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return r;
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}
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r = rdev->vm_manager.funcs->init(rdev);
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if (r)
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return r;
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rdev->vm_manager.enabled = true;
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r = radeon_sa_bo_manager_start(rdev, &rdev->vm_manager.sa_manager);
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if (r)
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return r;
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}
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/* restore page table */
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list_for_each_entry(vm, &rdev->vm_manager.lru_vm, list) {
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if (vm->id == -1)
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continue;
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list_for_each_entry(bo_va, &vm->va, vm_list) {
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struct ttm_mem_reg *mem = NULL;
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if (bo_va->valid)
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mem = &bo_va->bo->tbo.mem;
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bo_va->valid = false;
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r = radeon_vm_bo_update_pte(rdev, vm, bo_va->bo, mem);
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if (r) {
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DRM_ERROR("Failed to update pte for vm %d!\n", vm->id);
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}
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}
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r = rdev->vm_manager.funcs->bind(rdev, vm, vm->id);
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if (r) {
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DRM_ERROR("Failed to bind vm %d!\n", vm->id);
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}
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}
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return 0;
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}
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|
|
/* global mutex must be lock */
|
|
/**
|
|
* radeon_vm_unbind_locked - unbind a specific vm
|
|
*
|
|
* @rdev: radeon_device pointer
|
|
* @vm: vm to unbind
|
|
*
|
|
* Unbind the requested vm (cayman+).
|
|
* Wait for use of the VM to finish, then unbind the page table,
|
|
* and free the page table memory.
|
|
*/
|
|
static void radeon_vm_unbind_locked(struct radeon_device *rdev,
|
|
struct radeon_vm *vm)
|
|
{
|
|
struct radeon_bo_va *bo_va;
|
|
|
|
if (vm->id == -1) {
|
|
return;
|
|
}
|
|
|
|
/* wait for vm use to end */
|
|
while (vm->fence) {
|
|
int r;
|
|
r = radeon_fence_wait(vm->fence, false);
|
|
if (r)
|
|
DRM_ERROR("error while waiting for fence: %d\n", r);
|
|
if (r == -EDEADLK) {
|
|
mutex_unlock(&rdev->vm_manager.lock);
|
|
r = radeon_gpu_reset(rdev);
|
|
mutex_lock(&rdev->vm_manager.lock);
|
|
if (!r)
|
|
continue;
|
|
}
|
|
break;
|
|
}
|
|
radeon_fence_unref(&vm->fence);
|
|
|
|
/* hw unbind */
|
|
rdev->vm_manager.funcs->unbind(rdev, vm);
|
|
rdev->vm_manager.use_bitmap &= ~(1 << vm->id);
|
|
list_del_init(&vm->list);
|
|
vm->id = -1;
|
|
radeon_sa_bo_free(rdev, &vm->sa_bo, NULL);
|
|
vm->pt = NULL;
|
|
|
|
list_for_each_entry(bo_va, &vm->va, vm_list) {
|
|
bo_va->valid = false;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* radeon_vm_manager_fini - tear down the vm manager
|
|
*
|
|
* @rdev: radeon_device pointer
|
|
*
|
|
* Tear down the VM manager (cayman+).
|
|
*/
|
|
void radeon_vm_manager_fini(struct radeon_device *rdev)
|
|
{
|
|
struct radeon_vm *vm, *tmp;
|
|
|
|
if (!rdev->vm_manager.enabled)
|
|
return;
|
|
|
|
mutex_lock(&rdev->vm_manager.lock);
|
|
/* unbind all active vm */
|
|
list_for_each_entry_safe(vm, tmp, &rdev->vm_manager.lru_vm, list) {
|
|
radeon_vm_unbind_locked(rdev, vm);
|
|
}
|
|
rdev->vm_manager.funcs->fini(rdev);
|
|
mutex_unlock(&rdev->vm_manager.lock);
|
|
|
|
radeon_sa_bo_manager_suspend(rdev, &rdev->vm_manager.sa_manager);
|
|
radeon_sa_bo_manager_fini(rdev, &rdev->vm_manager.sa_manager);
|
|
rdev->vm_manager.enabled = false;
|
|
}
|
|
|
|
/* global mutex must be locked */
|
|
/**
|
|
* radeon_vm_unbind - locked version of unbind
|
|
*
|
|
* @rdev: radeon_device pointer
|
|
* @vm: vm to unbind
|
|
*
|
|
* Locked version that wraps radeon_vm_unbind_locked (cayman+).
|
|
*/
|
|
void radeon_vm_unbind(struct radeon_device *rdev, struct radeon_vm *vm)
|
|
{
|
|
mutex_lock(&vm->mutex);
|
|
radeon_vm_unbind_locked(rdev, vm);
|
|
mutex_unlock(&vm->mutex);
|
|
}
|
|
|
|
/* global and local mutex must be locked */
|
|
/**
|
|
* radeon_vm_bind - bind a page table to a VMID
|
|
*
|
|
* @rdev: radeon_device pointer
|
|
* @vm: vm to bind
|
|
*
|
|
* Bind the requested vm (cayman+).
|
|
* Suballocate memory for the page table, allocate a VMID
|
|
* and bind the page table to it, and finally start to populate
|
|
* the page table.
|
|
* Returns 0 for success, error for failure.
|
|
*/
|
|
int radeon_vm_bind(struct radeon_device *rdev, struct radeon_vm *vm)
|
|
{
|
|
struct radeon_vm *vm_evict;
|
|
unsigned i;
|
|
int id = -1, r;
|
|
|
|
if (vm == NULL) {
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (vm->id != -1) {
|
|
/* update lru */
|
|
list_del_init(&vm->list);
|
|
list_add_tail(&vm->list, &rdev->vm_manager.lru_vm);
|
|
return 0;
|
|
}
|
|
|
|
retry:
|
|
r = radeon_sa_bo_new(rdev, &rdev->vm_manager.sa_manager, &vm->sa_bo,
|
|
RADEON_GPU_PAGE_ALIGN(vm->last_pfn * 8),
|
|
RADEON_GPU_PAGE_SIZE, false);
|
|
if (r) {
|
|
if (list_empty(&rdev->vm_manager.lru_vm)) {
|
|
return r;
|
|
}
|
|
vm_evict = list_first_entry(&rdev->vm_manager.lru_vm, struct radeon_vm, list);
|
|
radeon_vm_unbind(rdev, vm_evict);
|
|
goto retry;
|
|
}
|
|
vm->pt = radeon_sa_bo_cpu_addr(vm->sa_bo);
|
|
vm->pt_gpu_addr = radeon_sa_bo_gpu_addr(vm->sa_bo);
|
|
memset(vm->pt, 0, RADEON_GPU_PAGE_ALIGN(vm->last_pfn * 8));
|
|
|
|
retry_id:
|
|
/* search for free vm */
|
|
for (i = 0; i < rdev->vm_manager.nvm; i++) {
|
|
if (!(rdev->vm_manager.use_bitmap & (1 << i))) {
|
|
id = i;
|
|
break;
|
|
}
|
|
}
|
|
/* evict vm if necessary */
|
|
if (id == -1) {
|
|
vm_evict = list_first_entry(&rdev->vm_manager.lru_vm, struct radeon_vm, list);
|
|
radeon_vm_unbind(rdev, vm_evict);
|
|
goto retry_id;
|
|
}
|
|
|
|
/* do hw bind */
|
|
r = rdev->vm_manager.funcs->bind(rdev, vm, id);
|
|
if (r) {
|
|
radeon_sa_bo_free(rdev, &vm->sa_bo, NULL);
|
|
return r;
|
|
}
|
|
rdev->vm_manager.use_bitmap |= 1 << id;
|
|
vm->id = id;
|
|
list_add_tail(&vm->list, &rdev->vm_manager.lru_vm);
|
|
return radeon_vm_bo_update_pte(rdev, vm, rdev->ring_tmp_bo.bo,
|
|
&rdev->ring_tmp_bo.bo->tbo.mem);
|
|
}
|
|
|
|
/* object have to be reserved */
|
|
/**
|
|
* radeon_vm_bo_add - add a bo to a specific vm
|
|
*
|
|
* @rdev: radeon_device pointer
|
|
* @vm: requested vm
|
|
* @bo: radeon buffer object
|
|
* @offset: requested offset of the buffer in the VM address space
|
|
* @flags: attributes of pages (read/write/valid/etc.)
|
|
*
|
|
* Add @bo into the requested vm (cayman+).
|
|
* Add @bo to the list of bos associated with the vm and validate
|
|
* the offset requested within the vm address space.
|
|
* Returns 0 for success, error for failure.
|
|
*/
|
|
int radeon_vm_bo_add(struct radeon_device *rdev,
|
|
struct radeon_vm *vm,
|
|
struct radeon_bo *bo,
|
|
uint64_t offset,
|
|
uint32_t flags)
|
|
{
|
|
struct radeon_bo_va *bo_va, *tmp;
|
|
struct list_head *head;
|
|
uint64_t size = radeon_bo_size(bo), last_offset = 0;
|
|
unsigned last_pfn;
|
|
|
|
bo_va = kzalloc(sizeof(struct radeon_bo_va), GFP_KERNEL);
|
|
if (bo_va == NULL) {
|
|
return -ENOMEM;
|
|
}
|
|
bo_va->vm = vm;
|
|
bo_va->bo = bo;
|
|
bo_va->soffset = offset;
|
|
bo_va->eoffset = offset + size;
|
|
bo_va->flags = flags;
|
|
bo_va->valid = false;
|
|
INIT_LIST_HEAD(&bo_va->bo_list);
|
|
INIT_LIST_HEAD(&bo_va->vm_list);
|
|
/* make sure object fit at this offset */
|
|
if (bo_va->soffset >= bo_va->eoffset) {
|
|
kfree(bo_va);
|
|
return -EINVAL;
|
|
}
|
|
|
|
last_pfn = bo_va->eoffset / RADEON_GPU_PAGE_SIZE;
|
|
if (last_pfn > rdev->vm_manager.max_pfn) {
|
|
kfree(bo_va);
|
|
dev_err(rdev->dev, "va above limit (0x%08X > 0x%08X)\n",
|
|
last_pfn, rdev->vm_manager.max_pfn);
|
|
return -EINVAL;
|
|
}
|
|
|
|
mutex_lock(&vm->mutex);
|
|
if (last_pfn > vm->last_pfn) {
|
|
/* release mutex and lock in right order */
|
|
mutex_unlock(&vm->mutex);
|
|
mutex_lock(&rdev->vm_manager.lock);
|
|
mutex_lock(&vm->mutex);
|
|
/* and check again */
|
|
if (last_pfn > vm->last_pfn) {
|
|
/* grow va space 32M by 32M */
|
|
unsigned align = ((32 << 20) >> 12) - 1;
|
|
radeon_vm_unbind_locked(rdev, vm);
|
|
vm->last_pfn = (last_pfn + align) & ~align;
|
|
}
|
|
mutex_unlock(&rdev->vm_manager.lock);
|
|
}
|
|
head = &vm->va;
|
|
last_offset = 0;
|
|
list_for_each_entry(tmp, &vm->va, vm_list) {
|
|
if (bo_va->soffset >= last_offset && bo_va->eoffset < tmp->soffset) {
|
|
/* bo can be added before this one */
|
|
break;
|
|
}
|
|
if (bo_va->soffset >= tmp->soffset && bo_va->soffset < tmp->eoffset) {
|
|
/* bo and tmp overlap, invalid offset */
|
|
dev_err(rdev->dev, "bo %p va 0x%08X conflict with (bo %p 0x%08X 0x%08X)\n",
|
|
bo, (unsigned)bo_va->soffset, tmp->bo,
|
|
(unsigned)tmp->soffset, (unsigned)tmp->eoffset);
|
|
kfree(bo_va);
|
|
mutex_unlock(&vm->mutex);
|
|
return -EINVAL;
|
|
}
|
|
last_offset = tmp->eoffset;
|
|
head = &tmp->vm_list;
|
|
}
|
|
list_add(&bo_va->vm_list, head);
|
|
list_add_tail(&bo_va->bo_list, &bo->va);
|
|
mutex_unlock(&vm->mutex);
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* radeon_vm_get_addr - get the physical address of the page
|
|
*
|
|
* @rdev: radeon_device pointer
|
|
* @mem: ttm mem
|
|
* @pfn: pfn
|
|
*
|
|
* Look up the physical address of the page that the pte resolves
|
|
* to (cayman+).
|
|
* Returns the physical address of the page.
|
|
*/
|
|
static u64 radeon_vm_get_addr(struct radeon_device *rdev,
|
|
struct ttm_mem_reg *mem,
|
|
unsigned pfn)
|
|
{
|
|
u64 addr = 0;
|
|
|
|
switch (mem->mem_type) {
|
|
case TTM_PL_VRAM:
|
|
addr = (mem->start << PAGE_SHIFT);
|
|
addr += pfn * RADEON_GPU_PAGE_SIZE;
|
|
addr += rdev->vm_manager.vram_base_offset;
|
|
break;
|
|
case TTM_PL_TT:
|
|
/* offset inside page table */
|
|
addr = mem->start << PAGE_SHIFT;
|
|
addr += pfn * RADEON_GPU_PAGE_SIZE;
|
|
addr = addr >> PAGE_SHIFT;
|
|
/* page table offset */
|
|
addr = rdev->gart.pages_addr[addr];
|
|
/* in case cpu page size != gpu page size*/
|
|
addr += (pfn * RADEON_GPU_PAGE_SIZE) & (~PAGE_MASK);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
return addr;
|
|
}
|
|
|
|
/* object have to be reserved & global and local mutex must be locked */
|
|
/**
|
|
* radeon_vm_bo_update_pte - map a bo into the vm page table
|
|
*
|
|
* @rdev: radeon_device pointer
|
|
* @vm: requested vm
|
|
* @bo: radeon buffer object
|
|
* @mem: ttm mem
|
|
*
|
|
* Fill in the page table entries for @bo (cayman+).
|
|
* Returns 0 for success, -EINVAL for failure.
|
|
*/
|
|
int radeon_vm_bo_update_pte(struct radeon_device *rdev,
|
|
struct radeon_vm *vm,
|
|
struct radeon_bo *bo,
|
|
struct ttm_mem_reg *mem)
|
|
{
|
|
struct radeon_bo_va *bo_va;
|
|
unsigned ngpu_pages, i;
|
|
uint64_t addr = 0, pfn;
|
|
uint32_t flags;
|
|
|
|
/* nothing to do if vm isn't bound */
|
|
if (vm->id == -1)
|
|
return 0;
|
|
|
|
bo_va = radeon_bo_va(bo, vm);
|
|
if (bo_va == NULL) {
|
|
dev_err(rdev->dev, "bo %p not in vm %p\n", bo, vm);
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (bo_va->valid)
|
|
return 0;
|
|
|
|
ngpu_pages = radeon_bo_ngpu_pages(bo);
|
|
bo_va->flags &= ~RADEON_VM_PAGE_VALID;
|
|
bo_va->flags &= ~RADEON_VM_PAGE_SYSTEM;
|
|
if (mem) {
|
|
if (mem->mem_type != TTM_PL_SYSTEM) {
|
|
bo_va->flags |= RADEON_VM_PAGE_VALID;
|
|
bo_va->valid = true;
|
|
}
|
|
if (mem->mem_type == TTM_PL_TT) {
|
|
bo_va->flags |= RADEON_VM_PAGE_SYSTEM;
|
|
}
|
|
}
|
|
pfn = bo_va->soffset / RADEON_GPU_PAGE_SIZE;
|
|
flags = rdev->vm_manager.funcs->page_flags(rdev, bo_va->vm, bo_va->flags);
|
|
for (i = 0, addr = 0; i < ngpu_pages; i++) {
|
|
if (mem && bo_va->valid) {
|
|
addr = radeon_vm_get_addr(rdev, mem, i);
|
|
}
|
|
rdev->vm_manager.funcs->set_page(rdev, bo_va->vm, i + pfn, addr, flags);
|
|
}
|
|
rdev->vm_manager.funcs->tlb_flush(rdev, bo_va->vm);
|
|
return 0;
|
|
}
|
|
|
|
/* object have to be reserved */
|
|
/**
|
|
* radeon_vm_bo_rmv - remove a bo to a specific vm
|
|
*
|
|
* @rdev: radeon_device pointer
|
|
* @vm: requested vm
|
|
* @bo: radeon buffer object
|
|
*
|
|
* Remove @bo from the requested vm (cayman+).
|
|
* Remove @bo from the list of bos associated with the vm and
|
|
* remove the ptes for @bo in the page table.
|
|
* Returns 0 for success.
|
|
*/
|
|
int radeon_vm_bo_rmv(struct radeon_device *rdev,
|
|
struct radeon_vm *vm,
|
|
struct radeon_bo *bo)
|
|
{
|
|
struct radeon_bo_va *bo_va;
|
|
|
|
bo_va = radeon_bo_va(bo, vm);
|
|
if (bo_va == NULL)
|
|
return 0;
|
|
|
|
mutex_lock(&rdev->vm_manager.lock);
|
|
mutex_lock(&vm->mutex);
|
|
radeon_vm_bo_update_pte(rdev, vm, bo, NULL);
|
|
mutex_unlock(&rdev->vm_manager.lock);
|
|
list_del(&bo_va->vm_list);
|
|
mutex_unlock(&vm->mutex);
|
|
list_del(&bo_va->bo_list);
|
|
|
|
kfree(bo_va);
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* radeon_vm_bo_invalidate - mark the bo as invalid
|
|
*
|
|
* @rdev: radeon_device pointer
|
|
* @vm: requested vm
|
|
* @bo: radeon buffer object
|
|
*
|
|
* Mark @bo as invalid (cayman+).
|
|
*/
|
|
void radeon_vm_bo_invalidate(struct radeon_device *rdev,
|
|
struct radeon_bo *bo)
|
|
{
|
|
struct radeon_bo_va *bo_va;
|
|
|
|
BUG_ON(!atomic_read(&bo->tbo.reserved));
|
|
list_for_each_entry(bo_va, &bo->va, bo_list) {
|
|
bo_va->valid = false;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* radeon_vm_init - initialize a vm instance
|
|
*
|
|
* @rdev: radeon_device pointer
|
|
* @vm: requested vm
|
|
*
|
|
* Init @vm (cayman+).
|
|
* Map the IB pool and any other shared objects into the VM
|
|
* by default as it's used by all VMs.
|
|
* Returns 0 for success, error for failure.
|
|
*/
|
|
int radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm)
|
|
{
|
|
int r;
|
|
|
|
vm->id = -1;
|
|
vm->fence = NULL;
|
|
mutex_init(&vm->mutex);
|
|
INIT_LIST_HEAD(&vm->list);
|
|
INIT_LIST_HEAD(&vm->va);
|
|
vm->last_pfn = 0;
|
|
/* map the ib pool buffer at 0 in virtual address space, set
|
|
* read only
|
|
*/
|
|
r = radeon_vm_bo_add(rdev, vm, rdev->ring_tmp_bo.bo, 0,
|
|
RADEON_VM_PAGE_READABLE | RADEON_VM_PAGE_SNOOPED);
|
|
return r;
|
|
}
|
|
|
|
/**
|
|
* radeon_vm_init - tear down a vm instance
|
|
*
|
|
* @rdev: radeon_device pointer
|
|
* @vm: requested vm
|
|
*
|
|
* Tear down @vm (cayman+).
|
|
* Unbind the VM and remove all bos from the vm bo list
|
|
*/
|
|
void radeon_vm_fini(struct radeon_device *rdev, struct radeon_vm *vm)
|
|
{
|
|
struct radeon_bo_va *bo_va, *tmp;
|
|
int r;
|
|
|
|
mutex_lock(&rdev->vm_manager.lock);
|
|
mutex_lock(&vm->mutex);
|
|
radeon_vm_unbind_locked(rdev, vm);
|
|
mutex_unlock(&rdev->vm_manager.lock);
|
|
|
|
/* remove all bo */
|
|
r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false);
|
|
if (!r) {
|
|
bo_va = radeon_bo_va(rdev->ring_tmp_bo.bo, vm);
|
|
list_del_init(&bo_va->bo_list);
|
|
list_del_init(&bo_va->vm_list);
|
|
radeon_bo_unreserve(rdev->ring_tmp_bo.bo);
|
|
kfree(bo_va);
|
|
}
|
|
if (!list_empty(&vm->va)) {
|
|
dev_err(rdev->dev, "still active bo inside vm\n");
|
|
}
|
|
list_for_each_entry_safe(bo_va, tmp, &vm->va, vm_list) {
|
|
list_del_init(&bo_va->vm_list);
|
|
r = radeon_bo_reserve(bo_va->bo, false);
|
|
if (!r) {
|
|
list_del_init(&bo_va->bo_list);
|
|
radeon_bo_unreserve(bo_va->bo);
|
|
kfree(bo_va);
|
|
}
|
|
}
|
|
mutex_unlock(&vm->mutex);
|
|
}
|