![Jerome Glisse](/assets/img/avatar_default.png)
GPU reset need to be exclusive, one happening at a time. For this add a rw semaphore so that any path that trigger GPU activities have to take the semaphore as a reader thus allowing concurency. The GPU reset path take the semaphore as a writer ensuring that no concurrent reset take place. v2: init rw semaphore Signed-off-by: Jerome Glisse <jglisse@redhat.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
532 lines
14 KiB
C
532 lines
14 KiB
C
/*
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* Copyright 2008 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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* Copyright 2009 Jerome Glisse.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alex Deucher
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* Jerome Glisse
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*/
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#include "drmP.h"
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#include "drm.h"
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#include "radeon_drm.h"
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#include "radeon.h"
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int radeon_gem_object_init(struct drm_gem_object *obj)
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{
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BUG();
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return 0;
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}
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void radeon_gem_object_free(struct drm_gem_object *gobj)
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{
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struct radeon_bo *robj = gem_to_radeon_bo(gobj);
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if (robj) {
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if (robj->gem_base.import_attach)
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drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
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radeon_bo_unref(&robj);
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}
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}
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int radeon_gem_object_create(struct radeon_device *rdev, int size,
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int alignment, int initial_domain,
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bool discardable, bool kernel,
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struct drm_gem_object **obj)
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{
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struct radeon_bo *robj;
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int r;
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*obj = NULL;
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/* At least align on page size */
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if (alignment < PAGE_SIZE) {
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alignment = PAGE_SIZE;
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}
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r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj);
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if (r) {
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if (r != -ERESTARTSYS)
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DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
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size, initial_domain, alignment, r);
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return r;
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}
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*obj = &robj->gem_base;
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mutex_lock(&rdev->gem.mutex);
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list_add_tail(&robj->list, &rdev->gem.objects);
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mutex_unlock(&rdev->gem.mutex);
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return 0;
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}
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int radeon_gem_set_domain(struct drm_gem_object *gobj,
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uint32_t rdomain, uint32_t wdomain)
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{
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struct radeon_bo *robj;
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uint32_t domain;
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int r;
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/* FIXME: reeimplement */
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robj = gem_to_radeon_bo(gobj);
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/* work out where to validate the buffer to */
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domain = wdomain;
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if (!domain) {
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domain = rdomain;
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}
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if (!domain) {
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/* Do nothings */
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printk(KERN_WARNING "Set domain without domain !\n");
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return 0;
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}
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if (domain == RADEON_GEM_DOMAIN_CPU) {
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/* Asking for cpu access wait for object idle */
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r = radeon_bo_wait(robj, NULL, false);
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if (r) {
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printk(KERN_ERR "Failed to wait for object !\n");
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return r;
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}
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}
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return 0;
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}
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int radeon_gem_init(struct radeon_device *rdev)
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{
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INIT_LIST_HEAD(&rdev->gem.objects);
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return 0;
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}
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void radeon_gem_fini(struct radeon_device *rdev)
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{
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radeon_bo_force_delete(rdev);
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}
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/*
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* Call from drm_gem_handle_create which appear in both new and open ioctl
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* case.
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*/
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int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
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{
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return 0;
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}
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void radeon_gem_object_close(struct drm_gem_object *obj,
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struct drm_file *file_priv)
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{
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struct radeon_bo *rbo = gem_to_radeon_bo(obj);
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struct radeon_device *rdev = rbo->rdev;
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struct radeon_fpriv *fpriv = file_priv->driver_priv;
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struct radeon_vm *vm = &fpriv->vm;
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struct radeon_bo_va *bo_va, *tmp;
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if (rdev->family < CHIP_CAYMAN) {
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return;
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}
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if (radeon_bo_reserve(rbo, false)) {
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return;
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}
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list_for_each_entry_safe(bo_va, tmp, &rbo->va, bo_list) {
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if (bo_va->vm == vm) {
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/* remove from this vm address space */
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mutex_lock(&vm->mutex);
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list_del(&bo_va->vm_list);
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mutex_unlock(&vm->mutex);
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list_del(&bo_va->bo_list);
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kfree(bo_va);
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}
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}
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radeon_bo_unreserve(rbo);
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}
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static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
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{
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if (r == -EDEADLK) {
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r = radeon_gpu_reset(rdev);
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if (!r)
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r = -EAGAIN;
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}
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return r;
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}
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/*
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* GEM ioctls.
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*/
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int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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struct radeon_device *rdev = dev->dev_private;
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struct drm_radeon_gem_info *args = data;
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struct ttm_mem_type_manager *man;
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unsigned i;
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man = &rdev->mman.bdev.man[TTM_PL_VRAM];
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args->vram_size = rdev->mc.real_vram_size;
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args->vram_visible = (u64)man->size << PAGE_SHIFT;
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if (rdev->stollen_vga_memory)
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args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
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args->vram_visible -= radeon_fbdev_total_size(rdev);
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args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024;
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for(i = 0; i < RADEON_NUM_RINGS; ++i)
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args->gart_size -= rdev->ring[i].ring_size;
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return 0;
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}
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int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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/* TODO: implement */
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DRM_ERROR("unimplemented %s\n", __func__);
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return -ENOSYS;
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}
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int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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/* TODO: implement */
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DRM_ERROR("unimplemented %s\n", __func__);
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return -ENOSYS;
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}
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int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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struct radeon_device *rdev = dev->dev_private;
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struct drm_radeon_gem_create *args = data;
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struct drm_gem_object *gobj;
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uint32_t handle;
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int r;
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down_read(&rdev->exclusive_lock);
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/* create a gem object to contain this object in */
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args->size = roundup(args->size, PAGE_SIZE);
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r = radeon_gem_object_create(rdev, args->size, args->alignment,
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args->initial_domain, false,
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false, &gobj);
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if (r) {
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up_read(&rdev->exclusive_lock);
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r = radeon_gem_handle_lockup(rdev, r);
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return r;
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}
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r = drm_gem_handle_create(filp, gobj, &handle);
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/* drop reference from allocate - handle holds it now */
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drm_gem_object_unreference_unlocked(gobj);
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if (r) {
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up_read(&rdev->exclusive_lock);
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r = radeon_gem_handle_lockup(rdev, r);
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return r;
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}
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args->handle = handle;
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up_read(&rdev->exclusive_lock);
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return 0;
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}
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int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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/* transition the BO to a domain -
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* just validate the BO into a certain domain */
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struct radeon_device *rdev = dev->dev_private;
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struct drm_radeon_gem_set_domain *args = data;
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struct drm_gem_object *gobj;
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struct radeon_bo *robj;
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int r;
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/* for now if someone requests domain CPU -
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* just make sure the buffer is finished with */
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down_read(&rdev->exclusive_lock);
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/* just do a BO wait for now */
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gobj = drm_gem_object_lookup(dev, filp, args->handle);
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if (gobj == NULL) {
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up_read(&rdev->exclusive_lock);
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return -ENOENT;
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}
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robj = gem_to_radeon_bo(gobj);
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r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
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drm_gem_object_unreference_unlocked(gobj);
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up_read(&rdev->exclusive_lock);
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r = radeon_gem_handle_lockup(robj->rdev, r);
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return r;
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}
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int radeon_mode_dumb_mmap(struct drm_file *filp,
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struct drm_device *dev,
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uint32_t handle, uint64_t *offset_p)
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{
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struct drm_gem_object *gobj;
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struct radeon_bo *robj;
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gobj = drm_gem_object_lookup(dev, filp, handle);
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if (gobj == NULL) {
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return -ENOENT;
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}
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robj = gem_to_radeon_bo(gobj);
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*offset_p = radeon_bo_mmap_offset(robj);
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drm_gem_object_unreference_unlocked(gobj);
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return 0;
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}
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int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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struct drm_radeon_gem_mmap *args = data;
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return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
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}
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int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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struct drm_radeon_gem_busy *args = data;
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struct drm_gem_object *gobj;
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struct radeon_bo *robj;
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int r;
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uint32_t cur_placement = 0;
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gobj = drm_gem_object_lookup(dev, filp, args->handle);
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if (gobj == NULL) {
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return -ENOENT;
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}
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robj = gem_to_radeon_bo(gobj);
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r = radeon_bo_wait(robj, &cur_placement, true);
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switch (cur_placement) {
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case TTM_PL_VRAM:
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args->domain = RADEON_GEM_DOMAIN_VRAM;
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break;
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case TTM_PL_TT:
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args->domain = RADEON_GEM_DOMAIN_GTT;
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break;
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case TTM_PL_SYSTEM:
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args->domain = RADEON_GEM_DOMAIN_CPU;
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default:
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break;
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}
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drm_gem_object_unreference_unlocked(gobj);
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r = radeon_gem_handle_lockup(robj->rdev, r);
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return r;
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}
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int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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struct drm_radeon_gem_wait_idle *args = data;
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struct drm_gem_object *gobj;
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struct radeon_bo *robj;
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int r;
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gobj = drm_gem_object_lookup(dev, filp, args->handle);
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if (gobj == NULL) {
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return -ENOENT;
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}
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robj = gem_to_radeon_bo(gobj);
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r = radeon_bo_wait(robj, NULL, false);
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/* callback hw specific functions if any */
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if (robj->rdev->asic->ioctl_wait_idle)
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robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
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drm_gem_object_unreference_unlocked(gobj);
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r = radeon_gem_handle_lockup(robj->rdev, r);
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return r;
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}
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int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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struct drm_radeon_gem_set_tiling *args = data;
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struct drm_gem_object *gobj;
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struct radeon_bo *robj;
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int r = 0;
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DRM_DEBUG("%d \n", args->handle);
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gobj = drm_gem_object_lookup(dev, filp, args->handle);
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if (gobj == NULL)
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return -ENOENT;
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robj = gem_to_radeon_bo(gobj);
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r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
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drm_gem_object_unreference_unlocked(gobj);
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return r;
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}
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int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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struct drm_radeon_gem_get_tiling *args = data;
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struct drm_gem_object *gobj;
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struct radeon_bo *rbo;
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int r = 0;
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DRM_DEBUG("\n");
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gobj = drm_gem_object_lookup(dev, filp, args->handle);
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if (gobj == NULL)
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return -ENOENT;
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rbo = gem_to_radeon_bo(gobj);
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r = radeon_bo_reserve(rbo, false);
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if (unlikely(r != 0))
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goto out;
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radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
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radeon_bo_unreserve(rbo);
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out:
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drm_gem_object_unreference_unlocked(gobj);
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return r;
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}
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int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp)
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{
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struct drm_radeon_gem_va *args = data;
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struct drm_gem_object *gobj;
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struct radeon_device *rdev = dev->dev_private;
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struct radeon_fpriv *fpriv = filp->driver_priv;
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struct radeon_bo *rbo;
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struct radeon_bo_va *bo_va;
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u32 invalid_flags;
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int r = 0;
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if (!rdev->vm_manager.enabled) {
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args->operation = RADEON_VA_RESULT_ERROR;
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return -ENOTTY;
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}
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/* !! DONT REMOVE !!
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* We don't support vm_id yet, to be sure we don't have have broken
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* userspace, reject anyone trying to use non 0 value thus moving
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* forward we can use those fields without breaking existant userspace
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*/
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if (args->vm_id) {
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args->operation = RADEON_VA_RESULT_ERROR;
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return -EINVAL;
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}
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if (args->offset < RADEON_VA_RESERVED_SIZE) {
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dev_err(&dev->pdev->dev,
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"offset 0x%lX is in reserved area 0x%X\n",
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(unsigned long)args->offset,
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RADEON_VA_RESERVED_SIZE);
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args->operation = RADEON_VA_RESULT_ERROR;
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return -EINVAL;
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}
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/* don't remove, we need to enforce userspace to set the snooped flag
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* otherwise we will endup with broken userspace and we won't be able
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* to enable this feature without adding new interface
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*/
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invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
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if ((args->flags & invalid_flags)) {
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dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
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args->flags, invalid_flags);
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args->operation = RADEON_VA_RESULT_ERROR;
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return -EINVAL;
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}
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if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) {
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dev_err(&dev->pdev->dev, "only supported snooped mapping for now\n");
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args->operation = RADEON_VA_RESULT_ERROR;
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return -EINVAL;
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}
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switch (args->operation) {
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case RADEON_VA_MAP:
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case RADEON_VA_UNMAP:
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break;
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default:
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dev_err(&dev->pdev->dev, "unsupported operation %d\n",
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args->operation);
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args->operation = RADEON_VA_RESULT_ERROR;
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return -EINVAL;
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}
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gobj = drm_gem_object_lookup(dev, filp, args->handle);
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if (gobj == NULL) {
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args->operation = RADEON_VA_RESULT_ERROR;
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return -ENOENT;
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}
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rbo = gem_to_radeon_bo(gobj);
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r = radeon_bo_reserve(rbo, false);
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if (r) {
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args->operation = RADEON_VA_RESULT_ERROR;
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drm_gem_object_unreference_unlocked(gobj);
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return r;
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}
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switch (args->operation) {
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case RADEON_VA_MAP:
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bo_va = radeon_bo_va(rbo, &fpriv->vm);
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if (bo_va) {
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args->operation = RADEON_VA_RESULT_VA_EXIST;
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args->offset = bo_va->soffset;
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goto out;
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}
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r = radeon_vm_bo_add(rdev, &fpriv->vm, rbo,
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args->offset, args->flags);
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break;
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case RADEON_VA_UNMAP:
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r = radeon_vm_bo_rmv(rdev, &fpriv->vm, rbo);
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break;
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default:
|
|
break;
|
|
}
|
|
args->operation = RADEON_VA_RESULT_OK;
|
|
if (r) {
|
|
args->operation = RADEON_VA_RESULT_ERROR;
|
|
}
|
|
out:
|
|
radeon_bo_unreserve(rbo);
|
|
drm_gem_object_unreference_unlocked(gobj);
|
|
return r;
|
|
}
|
|
|
|
int radeon_mode_dumb_create(struct drm_file *file_priv,
|
|
struct drm_device *dev,
|
|
struct drm_mode_create_dumb *args)
|
|
{
|
|
struct radeon_device *rdev = dev->dev_private;
|
|
struct drm_gem_object *gobj;
|
|
uint32_t handle;
|
|
int r;
|
|
|
|
args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
|
|
args->size = args->pitch * args->height;
|
|
args->size = ALIGN(args->size, PAGE_SIZE);
|
|
|
|
r = radeon_gem_object_create(rdev, args->size, 0,
|
|
RADEON_GEM_DOMAIN_VRAM,
|
|
false, ttm_bo_type_device,
|
|
&gobj);
|
|
if (r)
|
|
return -ENOMEM;
|
|
|
|
r = drm_gem_handle_create(file_priv, gobj, &handle);
|
|
/* drop reference from allocate - handle holds it now */
|
|
drm_gem_object_unreference_unlocked(gobj);
|
|
if (r) {
|
|
return r;
|
|
}
|
|
args->handle = handle;
|
|
return 0;
|
|
}
|
|
|
|
int radeon_mode_dumb_destroy(struct drm_file *file_priv,
|
|
struct drm_device *dev,
|
|
uint32_t handle)
|
|
{
|
|
return drm_gem_handle_delete(file_priv, handle);
|
|
}
|