![Vineet Gupta](/assets/img/avatar_default.png)
- Remove explicit clocksource setup and let it be done by OF framework by defining CLOCKSOURCE_OF_DECLARE() for various timers - This allows multiple clocksources to be potentially registered simultaneouly: previously we could only do one - as all of them had same arc_counter_setup() routine for registration - Setup routines also ensure that the underlying timer actually exists. - Remove some of the panic() calls if underlying timer is NOT detected as fallback clocksource might still be available 1. If GRFC doesn't exist, jiffies clocksource gets registered anyways 2. if RTC doesn't exist, TIMER1 can take over (as it is always present) Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
544 lines
14 KiB
C
544 lines
14 KiB
C
/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/seq_file.h>
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#include <linux/fs.h>
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#include <linux/delay.h>
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#include <linux/root_dev.h>
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#include <linux/console.h>
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#include <linux/module.h>
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#include <linux/cpu.h>
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#include <linux/of_fdt.h>
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#include <linux/of_platform.h>
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#include <linux/cache.h>
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#include <asm/sections.h>
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#include <asm/arcregs.h>
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#include <asm/tlb.h>
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#include <asm/setup.h>
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#include <asm/page.h>
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#include <asm/irq.h>
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#include <asm/unwind.h>
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#include <asm/clk.h>
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#include <asm/mach_desc.h>
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#include <asm/smp.h>
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#define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
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unsigned int intr_to_DE_cnt;
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/* Part of U-boot ABI: see head.S */
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int __initdata uboot_tag;
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char __initdata *uboot_arg;
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const struct machine_desc *machine_desc;
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struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
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struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
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static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
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{
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if (is_isa_arcompact()) {
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struct bcr_iccm_arcompact iccm;
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struct bcr_dccm_arcompact dccm;
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READ_BCR(ARC_REG_ICCM_BUILD, iccm);
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if (iccm.ver) {
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cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */
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cpu->iccm.base_addr = iccm.base << 16;
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}
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READ_BCR(ARC_REG_DCCM_BUILD, dccm);
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if (dccm.ver) {
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unsigned long base;
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cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */
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base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
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cpu->dccm.base_addr = base & ~0xF;
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}
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} else {
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struct bcr_iccm_arcv2 iccm;
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struct bcr_dccm_arcv2 dccm;
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unsigned long region;
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READ_BCR(ARC_REG_ICCM_BUILD, iccm);
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if (iccm.ver) {
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cpu->iccm.sz = 256 << iccm.sz00; /* 512B to 16M */
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if (iccm.sz00 == 0xF && iccm.sz01 > 0)
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cpu->iccm.sz <<= iccm.sz01;
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region = read_aux_reg(ARC_REG_AUX_ICCM);
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cpu->iccm.base_addr = region & 0xF0000000;
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}
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READ_BCR(ARC_REG_DCCM_BUILD, dccm);
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if (dccm.ver) {
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cpu->dccm.sz = 256 << dccm.sz0;
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if (dccm.sz0 == 0xF && dccm.sz1 > 0)
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cpu->dccm.sz <<= dccm.sz1;
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region = read_aux_reg(ARC_REG_AUX_DCCM);
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cpu->dccm.base_addr = region & 0xF0000000;
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}
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}
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}
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static void read_arc_build_cfg_regs(void)
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{
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struct bcr_timer timer;
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struct bcr_generic bcr;
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
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FIX_PTR(cpu);
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READ_BCR(AUX_IDENTITY, cpu->core);
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READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
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READ_BCR(ARC_REG_TIMERS_BCR, timer);
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cpu->extn.timer0 = timer.t0;
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cpu->extn.timer1 = timer.t1;
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cpu->extn.rtc = timer.rtc;
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cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
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READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
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cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
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cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
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cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
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cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
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cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
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READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
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/* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
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read_decode_ccm_bcr(cpu);
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read_decode_mmu_bcr();
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read_decode_cache_bcr();
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if (is_isa_arcompact()) {
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struct bcr_fp_arcompact sp, dp;
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struct bcr_bpu_arcompact bpu;
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READ_BCR(ARC_REG_FP_BCR, sp);
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READ_BCR(ARC_REG_DPFP_BCR, dp);
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cpu->extn.fpu_sp = sp.ver ? 1 : 0;
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cpu->extn.fpu_dp = dp.ver ? 1 : 0;
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READ_BCR(ARC_REG_BPU_BCR, bpu);
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cpu->bpu.ver = bpu.ver;
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cpu->bpu.full = bpu.fam ? 1 : 0;
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if (bpu.ent) {
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cpu->bpu.num_cache = 256 << (bpu.ent - 1);
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cpu->bpu.num_pred = 256 << (bpu.ent - 1);
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}
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} else {
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struct bcr_fp_arcv2 spdp;
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struct bcr_bpu_arcv2 bpu;
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READ_BCR(ARC_REG_FP_V2_BCR, spdp);
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cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
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cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
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READ_BCR(ARC_REG_BPU_BCR, bpu);
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cpu->bpu.ver = bpu.ver;
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cpu->bpu.full = bpu.ft;
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cpu->bpu.num_cache = 256 << bpu.bce;
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cpu->bpu.num_pred = 2048 << bpu.pte;
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}
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READ_BCR(ARC_REG_AP_BCR, bcr);
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cpu->extn.ap = bcr.ver ? 1 : 0;
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READ_BCR(ARC_REG_SMART_BCR, bcr);
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cpu->extn.smart = bcr.ver ? 1 : 0;
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READ_BCR(ARC_REG_RTT_BCR, bcr);
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cpu->extn.rtt = bcr.ver ? 1 : 0;
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cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
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}
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static const struct cpuinfo_data arc_cpu_tbl[] = {
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#ifdef CONFIG_ISA_ARCOMPACT
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{ {0x20, "ARC 600" }, 0x2F},
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{ {0x30, "ARC 700" }, 0x33},
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{ {0x34, "ARC 700 R4.10"}, 0x34},
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{ {0x35, "ARC 700 R4.11"}, 0x35},
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#else
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{ {0x50, "ARC HS38 R2.0"}, 0x51},
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{ {0x52, "ARC HS38 R2.1"}, 0x52},
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#endif
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{ {0x00, NULL } }
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};
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static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
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{
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
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struct bcr_identity *core = &cpu->core;
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const struct cpuinfo_data *tbl;
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char *isa_nm;
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int i, be, atomic;
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int n = 0;
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FIX_PTR(cpu);
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if (is_isa_arcompact()) {
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isa_nm = "ARCompact";
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be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
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atomic = cpu->isa.atomic1;
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if (!cpu->isa.ver) /* ISA BCR absent, use Kconfig info */
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atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
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} else {
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isa_nm = "ARCv2";
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be = cpu->isa.be;
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atomic = cpu->isa.atomic;
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}
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n += scnprintf(buf + n, len - n,
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"\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
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core->family, core->cpu_id, core->chip_id);
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for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
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if ((core->family >= tbl->info.id) &&
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(core->family <= tbl->up_range)) {
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n += scnprintf(buf + n, len - n,
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"processor [%d]\t: %s (%s ISA) %s\n",
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cpu_id, tbl->info.str, isa_nm,
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IS_AVAIL1(be, "[Big-Endian]"));
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break;
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}
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}
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if (tbl->info.id == 0)
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n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
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n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
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(unsigned int)(arc_get_core_freq() / 1000000),
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(unsigned int)(arc_get_core_freq() / 10000) % 100);
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n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
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IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
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IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
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IS_AVAIL2(cpu->extn.rtc, "Local-64-bit-Ctr ",
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CONFIG_ARC_HAS_RTC));
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n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
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IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
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IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
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IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
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if (i)
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n += scnprintf(buf + n, len - n, "\n\t\t: ");
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if (cpu->extn_mpy.ver) {
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if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
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n += scnprintf(buf + n, len - n, "mpy ");
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} else {
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int opt = 2; /* stock MPY/MPYH */
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if (cpu->extn_mpy.dsp) /* OPT 7-9 */
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opt = cpu->extn_mpy.dsp + 6;
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n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
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}
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}
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n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
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IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
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IS_AVAIL1(cpu->extn.norm, "norm "),
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IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
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IS_AVAIL1(cpu->extn.swap, "swap "),
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IS_AVAIL1(cpu->extn.minmax, "minmax "),
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IS_AVAIL1(cpu->extn.crc, "crc "),
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IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));
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if (cpu->bpu.ver)
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n += scnprintf(buf + n, len - n,
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"BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
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IS_AVAIL1(cpu->bpu.full, "full"),
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IS_AVAIL1(!cpu->bpu.full, "partial"),
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cpu->bpu.num_cache, cpu->bpu.num_pred);
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return buf;
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}
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static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
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{
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int n = 0;
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
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FIX_PTR(cpu);
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n += scnprintf(buf + n, len - n,
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"Vector Table\t: %#x\nUncached Base\t: %#lx\n",
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cpu->vec_base, perip_base);
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if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
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n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
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IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
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IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
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if (cpu->extn.debug)
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n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
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IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
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IS_AVAIL1(cpu->extn.smart, "smaRT "),
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IS_AVAIL1(cpu->extn.rtt, "RTT "));
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if (cpu->dccm.sz || cpu->iccm.sz)
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n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
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cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
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cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
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n += scnprintf(buf + n, len - n,
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"OS ABI [v3]\t: no-legacy-syscalls\n");
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return buf;
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}
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static void arc_chk_core_config(void)
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{
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
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int fpu_enabled;
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if (!cpu->extn.timer0)
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panic("Timer0 is not present!\n");
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if (!cpu->extn.timer1)
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panic("Timer1 is not present!\n");
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#ifdef CONFIG_ARC_HAS_DCCM
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/*
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* DCCM can be arbit placed in hardware.
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* Make sure it's placement/sz matches what Linux is built with
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*/
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if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
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panic("Linux built with incorrect DCCM Base address\n");
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if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
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panic("Linux built with incorrect DCCM Size\n");
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#endif
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#ifdef CONFIG_ARC_HAS_ICCM
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if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
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panic("Linux built with incorrect ICCM Size\n");
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#endif
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/*
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* FP hardware/software config sanity
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* -If hardware contains DPFP, kernel needs to save/restore FPU state
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* -If not, it will crash trying to save/restore the non-existant regs
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*
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* (only DPDP checked since SP has no arch visible regs)
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*/
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fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
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if (cpu->extn.fpu_dp && !fpu_enabled)
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pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
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else if (!cpu->extn.fpu_dp && fpu_enabled)
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panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
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}
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/*
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* Initialize and setup the processor core
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* This is called by all the CPUs thus should not do special case stuff
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* such as only for boot CPU etc
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*/
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void setup_processor(void)
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{
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char str[512];
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int cpu_id = smp_processor_id();
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read_arc_build_cfg_regs();
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arc_init_IRQ();
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printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
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arc_mmu_init();
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arc_cache_init();
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printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
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printk(arc_platform_smp_cpuinfo());
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arc_chk_core_config();
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}
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static inline int is_kernel(unsigned long addr)
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{
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if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
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return 1;
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return 0;
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}
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void __init setup_arch(char **cmdline_p)
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{
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#ifdef CONFIG_ARC_UBOOT_SUPPORT
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/* make sure that uboot passed pointer to cmdline/dtb is valid */
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if (uboot_tag && is_kernel((unsigned long)uboot_arg))
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panic("Invalid uboot arg\n");
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/* See if u-boot passed an external Device Tree blob */
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machine_desc = setup_machine_fdt(uboot_arg); /* uboot_tag == 2 */
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if (!machine_desc)
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#endif
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{
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/* No, so try the embedded one */
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machine_desc = setup_machine_fdt(__dtb_start);
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if (!machine_desc)
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panic("Embedded DT invalid\n");
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/*
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* If we are here, it is established that @uboot_arg didn't
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* point to DT blob. Instead if u-boot says it is cmdline,
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* Appent to embedded DT cmdline.
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* setup_machine_fdt() would have populated @boot_command_line
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*/
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if (uboot_tag == 1) {
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/* Ensure a whitespace between the 2 cmdlines */
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strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
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strlcat(boot_command_line, uboot_arg,
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COMMAND_LINE_SIZE);
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}
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}
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/* Save unparsed command line copy for /proc/cmdline */
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*cmdline_p = boot_command_line;
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/* To force early parsing of things like mem=xxx */
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parse_early_param();
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/* Platform/board specific: e.g. early console registration */
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if (machine_desc->init_early)
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machine_desc->init_early();
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smp_init_cpus();
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setup_processor();
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setup_arch_memory();
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/* copy flat DT out of .init and then unflatten it */
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unflatten_and_copy_device_tree();
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/* Can be issue if someone passes cmd line arg "ro"
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* But that is unlikely so keeping it as it is
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*/
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root_mountflags &= ~MS_RDONLY;
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#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
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conswitchp = &dummy_con;
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#endif
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arc_unwind_init();
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}
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static int __init customize_machine(void)
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{
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/*
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* Traverses flattened DeviceTree - registering platform devices
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* (if any) complete with their resources
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*/
|
|
of_platform_default_populate(NULL, NULL, NULL);
|
|
|
|
if (machine_desc->init_machine)
|
|
machine_desc->init_machine();
|
|
|
|
return 0;
|
|
}
|
|
arch_initcall(customize_machine);
|
|
|
|
static int __init init_late_machine(void)
|
|
{
|
|
if (machine_desc->init_late)
|
|
machine_desc->init_late();
|
|
|
|
return 0;
|
|
}
|
|
late_initcall(init_late_machine);
|
|
/*
|
|
* Get CPU information for use by the procfs.
|
|
*/
|
|
|
|
#define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
|
|
#define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
|
|
|
|
static int show_cpuinfo(struct seq_file *m, void *v)
|
|
{
|
|
char *str;
|
|
int cpu_id = ptr_to_cpu(v);
|
|
|
|
if (!cpu_online(cpu_id)) {
|
|
seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
|
|
goto done;
|
|
}
|
|
|
|
str = (char *)__get_free_page(GFP_TEMPORARY);
|
|
if (!str)
|
|
goto done;
|
|
|
|
seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
|
|
|
|
seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
|
|
loops_per_jiffy / (500000 / HZ),
|
|
(loops_per_jiffy / (5000 / HZ)) % 100);
|
|
|
|
seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
|
|
seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
|
|
seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
|
|
seq_printf(m, arc_platform_smp_cpuinfo());
|
|
|
|
free_page((unsigned long)str);
|
|
done:
|
|
seq_printf(m, "\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void *c_start(struct seq_file *m, loff_t *pos)
|
|
{
|
|
/*
|
|
* Callback returns cpu-id to iterator for show routine, NULL to stop.
|
|
* However since NULL is also a valid cpu-id (0), we use a round-about
|
|
* way to pass it w/o having to kmalloc/free a 2 byte string.
|
|
* Encode cpu-id as 0xFFcccc, which is decoded by show routine.
|
|
*/
|
|
return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
|
|
}
|
|
|
|
static void *c_next(struct seq_file *m, void *v, loff_t *pos)
|
|
{
|
|
++*pos;
|
|
return c_start(m, pos);
|
|
}
|
|
|
|
static void c_stop(struct seq_file *m, void *v)
|
|
{
|
|
}
|
|
|
|
const struct seq_operations cpuinfo_op = {
|
|
.start = c_start,
|
|
.next = c_next,
|
|
.stop = c_stop,
|
|
.show = show_cpuinfo
|
|
};
|
|
|
|
static DEFINE_PER_CPU(struct cpu, cpu_topology);
|
|
|
|
static int __init topology_init(void)
|
|
{
|
|
int cpu;
|
|
|
|
for_each_present_cpu(cpu)
|
|
register_cpu(&per_cpu(cpu_topology, cpu), cpu);
|
|
|
|
return 0;
|
|
}
|
|
|
|
subsys_initcall(topology_init);
|