1ac6d46e43
Currently OMAP2 and 3 share the same omap_hwmod_class and omap_hwmod_class_sysconfig for dispc. However, OMAP3 has sysconfig bits that OMAP2 doesn't have, so we need to split those structs into OMAP2 and OMAP3 specific versions. This patch only splits the structs, without changing the contents. This is a prerequisite for a subsequent fix. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> [paul@pwsan.com: added commit note] Signed-off-by: Paul Walmsley <paul@pwsan.com>
173 lines
4.5 KiB
C
173 lines
4.5 KiB
C
/*
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* omap_hwmod_2xxx_ipblock_data.c - common IP block data for OMAP2xxx
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*
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* Copyright (C) 2011 Nokia Corporation
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <plat/omap_hwmod.h>
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#include <plat/serial.h>
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#include <plat/dma.h>
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#include <plat/dmtimer.h>
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#include <plat/mcspi.h>
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#include <mach/irqs.h>
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#include "omap_hwmod_common_data.h"
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#include "wd_timer.h"
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struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = {
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{ .irq = 48, },
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{ .irq = -1 }
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};
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struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = {
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{ .name = "dispc", .dma_req = 5 },
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{ .dma_req = -1 }
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};
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/*
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* 'dispc' class
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* display controller
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*/
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static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0014,
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.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
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SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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struct omap_hwmod_class omap2_dispc_hwmod_class = {
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.name = "dispc",
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.sysc = &omap2_dispc_sysc,
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};
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/* OMAP2xxx Timer Common */
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static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0014,
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.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
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SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
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SYSC_HAS_AUTOIDLE),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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struct omap_hwmod_class omap2xxx_timer_hwmod_class = {
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.name = "timer",
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.sysc = &omap2xxx_timer_sysc,
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.rev = OMAP_TIMER_IP_VERSION_1,
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};
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/*
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* 'wd_timer' class
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* 32-bit watchdog upward counter that generates a pulse on the reset pin on
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* overflow condition
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*/
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static struct omap_hwmod_class_sysconfig omap2xxx_wd_timer_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0014,
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.sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET |
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SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class = {
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.name = "wd_timer",
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.sysc = &omap2xxx_wd_timer_sysc,
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.pre_shutdown = &omap2_wd_timer_disable
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};
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/*
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* 'gpio' class
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* general purpose io module
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*/
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static struct omap_hwmod_class_sysconfig omap2xxx_gpio_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0014,
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.sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
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SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
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SYSS_HAS_RESET_STATUS),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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struct omap_hwmod_class omap2xxx_gpio_hwmod_class = {
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.name = "gpio",
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.sysc = &omap2xxx_gpio_sysc,
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.rev = 0,
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};
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/* system dma */
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static struct omap_hwmod_class_sysconfig omap2xxx_dma_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x002c,
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.syss_offs = 0x0028,
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.sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
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SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
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SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
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.idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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struct omap_hwmod_class omap2xxx_dma_hwmod_class = {
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.name = "dma",
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.sysc = &omap2xxx_dma_sysc,
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};
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/*
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* 'mailbox' class
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* mailbox module allowing communication between the on-chip processors
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* using a queued mailbox-interrupt mechanism.
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*/
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static struct omap_hwmod_class_sysconfig omap2xxx_mailbox_sysc = {
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.rev_offs = 0x000,
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.sysc_offs = 0x010,
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.syss_offs = 0x014,
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.sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
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SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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struct omap_hwmod_class omap2xxx_mailbox_hwmod_class = {
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.name = "mailbox",
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.sysc = &omap2xxx_mailbox_sysc,
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};
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/*
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* 'mcspi' class
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* multichannel serial port interface (mcspi) / master/slave synchronous serial
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* bus
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*/
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static struct omap_hwmod_class_sysconfig omap2xxx_mcspi_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.syss_offs = 0x0014,
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.sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
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SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
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SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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struct omap_hwmod_class omap2xxx_mcspi_class = {
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.name = "mcspi",
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.sysc = &omap2xxx_mcspi_sysc,
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.rev = OMAP2_MCSPI_REV,
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};
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