0f597ed435
Use atomic_notifier_chain to fire firmware events at internal mlx5 core components such as eswitch/fpga/clock/FW tracer/etc.., this is to avoid explicit calls from low level mlx5_core to upper components and to simplify the mlx5_core API for future developments. Simply provide register/unregister notifiers API and call the notifier chain on firmware async events. Example: to subscribe to a FW event: struct mlx5_nb port_event; MLX5_NB_INIT(&port_event, port_event_handler, PORT_CHANGE); mlx5_eq_notifier_register(mdev, &port_event); where: - port_event_handler is the notifier block callback. - PORT_EVENT is the suffix of MLX5_EVENT_TYPE_PORT_CHANGE. The above will guarantee that port_event_handler will receive all FW events of the type MLX5_EVENT_TYPE_PORT_CHANGE. To receive all FW/HW events one can subscribe to MLX5_EVENT_TYPE_NOTIFY_ANY. The next few patches will start moving all mlx5 core components to use this new API and cleanup mlx5_eq_async_int misx handler from component explicit calls and specific logic. Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
73 lines
1.9 KiB
C
73 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
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/* Copyright (c) 2018 Mellanox Technologies. */
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#ifndef MLX5_CORE_EQ_H
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#define MLX5_CORE_EQ_H
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enum {
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MLX5_EQ_PAGEREQ_IDX = 0,
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MLX5_EQ_CMD_IDX = 1,
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MLX5_EQ_ASYNC_IDX = 2,
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/* reserved to be used by mlx5_core ulps (mlx5e/mlx5_ib) */
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MLX5_EQ_PFAULT_IDX = 3,
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MLX5_EQ_MAX_ASYNC_EQS,
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/* completion eqs vector indices start here */
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MLX5_EQ_VEC_COMP_BASE = MLX5_EQ_MAX_ASYNC_EQS,
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};
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#define MLX5_NUM_CMD_EQE (32)
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#define MLX5_NUM_ASYNC_EQE (0x1000)
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#define MLX5_NUM_SPARE_EQE (0x80)
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struct mlx5_eq;
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struct mlx5_core_dev;
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struct mlx5_eq_param {
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u8 index;
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int nent;
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u64 mask;
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void *context;
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irq_handler_t handler;
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};
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struct mlx5_eq *
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mlx5_eq_create_generic(struct mlx5_core_dev *dev, const char *name,
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struct mlx5_eq_param *param);
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int
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mlx5_eq_destroy_generic(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
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struct mlx5_eqe *mlx5_eq_get_eqe(struct mlx5_eq *eq, u32 cc);
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void mlx5_eq_update_ci(struct mlx5_eq *eq, u32 cc, bool arm);
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/* The HCA will think the queue has overflowed if we
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* don't tell it we've been processing events. We
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* create EQs with MLX5_NUM_SPARE_EQE extra entries,
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* so we must update our consumer index at
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* least that often.
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*
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* mlx5_eq_update_cc must be called on every EQE @EQ irq handler
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*/
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static inline u32 mlx5_eq_update_cc(struct mlx5_eq *eq, u32 cc)
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{
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if (unlikely(cc >= MLX5_NUM_SPARE_EQE)) {
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mlx5_eq_update_ci(eq, cc, 0);
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cc = 0;
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}
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return cc;
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}
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struct mlx5_nb {
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struct notifier_block nb;
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u8 event_type;
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};
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#define mlx5_nb_cof(ptr, type, member) \
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(container_of(container_of(ptr, struct mlx5_nb, nb), type, member))
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#define MLX5_NB_INIT(name, handler, event) do { \
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(name)->nb.notifier_call = handler; \
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(name)->event_type = MLX5_EVENT_TYPE_##event; \
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} while (0)
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#endif /* MLX5_CORE_EQ_H */
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