da09091732
Advance the qed* drivers to use firmware 8.33.1.0: Modify core driver (qed) to utilize the new FW and initialize the device with it. This is the lion's share of the patch, and includes changes to FW interface files, device initialization flows, FW interaction flows, and debug collection flows. Modify Ethernet driver (qede) to make use of new FW in fastpath. Modify RoCE/iWARP driver (qedr) to make use of new FW in fastpath. Modify FCoE driver (qedf) to make use of new FW in fastpath. Modify iSCSI driver (qedi) to make use of new FW in fastpath. Signed-off-by: Ariel Elior <Ariel.Elior@cavium.com> Signed-off-by: Michal Kalderon <Michal.Kalderon@cavium.com> Signed-off-by: Yuval Bason <Yuval.Bason@cavium.com> Signed-off-by: Ram Amrani <Ram.Amrani@cavium.com> Signed-off-by: Manish Chopra <Manish.Chopra@cavium.com> Signed-off-by: Chad Dupuis <Chad.Dupuis@cavium.com> Signed-off-by: Manish Rangankar <Manish.Rangankar@cavium.com> Signed-off-by: Tomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
183 lines
5 KiB
C
183 lines
5 KiB
C
/* QLogic qed NIC Driver
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* Copyright (c) 2015-2017 QLogic Corporation
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and /or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef __STORAGE_COMMON__
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#define __STORAGE_COMMON__
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/*********************/
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/* SCSI CONSTANTS */
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/*********************/
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#define SCSI_MAX_NUM_OF_CMDQS (NUM_OF_GLOBAL_QUEUES / 2)
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#define BDQ_NUM_RESOURCES (4)
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#define BDQ_ID_RQ (0)
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#define BDQ_ID_IMM_DATA (1)
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#define BDQ_ID_TQ (2)
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#define BDQ_NUM_IDS (3)
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#define SCSI_NUM_SGES_SLOW_SGL_THR 8
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#define BDQ_MAX_EXTERNAL_RING_SIZE BIT(15)
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/* SCSI op codes */
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#define SCSI_OPCODE_COMPARE_AND_WRITE (0x89)
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#define SCSI_OPCODE_READ_10 (0x28)
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#define SCSI_OPCODE_WRITE_6 (0x0A)
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#define SCSI_OPCODE_WRITE_10 (0x2A)
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#define SCSI_OPCODE_WRITE_12 (0xAA)
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#define SCSI_OPCODE_WRITE_16 (0x8A)
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#define SCSI_OPCODE_WRITE_AND_VERIFY_10 (0x2E)
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#define SCSI_OPCODE_WRITE_AND_VERIFY_12 (0xAE)
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#define SCSI_OPCODE_WRITE_AND_VERIFY_16 (0x8E)
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/* iSCSI Drv opaque */
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struct iscsi_drv_opaque {
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__le16 reserved_zero[3];
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__le16 opaque;
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};
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/* Scsi 2B/8B opaque union */
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union scsi_opaque {
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struct regpair fcoe_opaque;
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struct iscsi_drv_opaque iscsi_opaque;
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};
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/* SCSI buffer descriptor */
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struct scsi_bd {
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struct regpair address;
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union scsi_opaque opaque;
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};
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/* Scsi Drv BDQ struct */
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struct scsi_bdq_ram_drv_data {
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__le16 external_producer;
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__le16 reserved0[3];
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};
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/* SCSI SGE entry */
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struct scsi_sge {
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struct regpair sge_addr;
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__le32 sge_len;
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__le32 reserved;
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};
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/* Cached SGEs section */
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struct scsi_cached_sges {
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struct scsi_sge sge[4];
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};
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/* Scsi Drv CMDQ struct */
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struct scsi_drv_cmdq {
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__le16 cmdq_cons;
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__le16 reserved0;
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__le32 reserved1;
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};
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/* Common SCSI init params passed by driver to FW in function init ramrod */
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struct scsi_init_func_params {
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__le16 num_tasks;
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u8 log_page_size;
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u8 debug_mode;
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u8 reserved2[12];
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};
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/* SCSI RQ/CQ/CMDQ firmware function init parameters */
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struct scsi_init_func_queues {
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struct regpair glbl_q_params_addr;
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__le16 rq_buffer_size;
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__le16 cq_num_entries;
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__le16 cmdq_num_entries;
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u8 bdq_resource_id;
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u8 q_validity;
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#define SCSI_INIT_FUNC_QUEUES_RQ_VALID_MASK 0x1
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#define SCSI_INIT_FUNC_QUEUES_RQ_VALID_SHIFT 0
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#define SCSI_INIT_FUNC_QUEUES_IMM_DATA_VALID_MASK 0x1
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#define SCSI_INIT_FUNC_QUEUES_IMM_DATA_VALID_SHIFT 1
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#define SCSI_INIT_FUNC_QUEUES_CMD_VALID_MASK 0x1
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#define SCSI_INIT_FUNC_QUEUES_CMD_VALID_SHIFT 2
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#define SCSI_INIT_FUNC_QUEUES_TQ_VALID_MASK 0x1
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#define SCSI_INIT_FUNC_QUEUES_TQ_VALID_SHIFT 3
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#define SCSI_INIT_FUNC_QUEUES_SOC_EN_MASK 0x1
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#define SCSI_INIT_FUNC_QUEUES_SOC_EN_SHIFT 4
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#define SCSI_INIT_FUNC_QUEUES_SOC_NUM_OF_BLOCKS_LOG_MASK 0x7
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#define SCSI_INIT_FUNC_QUEUES_SOC_NUM_OF_BLOCKS_LOG_SHIFT 5
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__le16 cq_cmdq_sb_num_arr[SCSI_MAX_NUM_OF_CMDQS];
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u8 num_queues;
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u8 queue_relative_offset;
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u8 cq_sb_pi;
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u8 cmdq_sb_pi;
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u8 bdq_pbl_num_entries[BDQ_NUM_IDS];
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u8 reserved1;
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struct regpair bdq_pbl_base_address[BDQ_NUM_IDS];
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__le16 bdq_xoff_threshold[BDQ_NUM_IDS];
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__le16 cmdq_xoff_threshold;
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__le16 bdq_xon_threshold[BDQ_NUM_IDS];
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__le16 cmdq_xon_threshold;
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};
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/* Scsi Drv BDQ Data struct (2 BDQ IDs: 0 - RQ, 1 - Immediate Data) */
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struct scsi_ram_per_bdq_resource_drv_data {
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struct scsi_bdq_ram_drv_data drv_data_per_bdq_id[BDQ_NUM_IDS];
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};
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/* SCSI SGL types */
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enum scsi_sgl_mode {
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SCSI_TX_SLOW_SGL,
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SCSI_FAST_SGL,
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MAX_SCSI_SGL_MODE
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};
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/* SCSI SGL parameters */
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struct scsi_sgl_params {
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struct regpair sgl_addr;
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__le32 sgl_total_length;
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__le32 sge_offset;
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__le16 sgl_num_sges;
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u8 sgl_index;
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u8 reserved;
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};
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/* SCSI terminate connection params */
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struct scsi_terminate_extra_params {
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__le16 unsolicited_cq_count;
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__le16 cmdq_count;
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u8 reserved[4];
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};
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/* SCSI Task Queue Element */
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struct scsi_tqe {
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__le16 itid;
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};
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#endif /* __STORAGE_COMMON__ */
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