d05c513069
Current instruction decoder for uprobe/kprobe handler only handles branches with delay slots. For compact branches the behaviour is rather unpredictable - and depending on the encoding of a compact branch instruction may result in one (or more) of: - executing an instruction that follows a branch which wasn't in a delay slot and shouldn't have been executed - incorrectly emulating a branch leading to a jump to a wrong location - unexpected branching out of the single-stepped code and never reaching the breakpoint that should terminate the probe handler Results of these actions are generally unpredictable, but can end up with a probed application or kernel crash, so disable placing probes on compact branches until they are handled properly. Signed-off-by: Marcin Nowakowski <marcin.nowakowski@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14336/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
84 lines
1.7 KiB
C
84 lines
1.7 KiB
C
/*
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* Copyright (C) 2016 Imagination Technologies
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* Author: Marcin Nowakowski <marcin.nowakowski@imgtec.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef __PROBES_COMMON_H
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#define __PROBES_COMMON_H
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#include <asm/inst.h>
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int __insn_is_compact_branch(union mips_instruction insn);
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static inline int __insn_has_delay_slot(const union mips_instruction insn)
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{
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switch (insn.i_format.opcode) {
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/*
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* jr and jalr are in r_format format.
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*/
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case spec_op:
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switch (insn.r_format.func) {
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case jalr_op:
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case jr_op:
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return 1;
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}
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break;
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/*
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* This group contains:
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* bltz_op, bgez_op, bltzl_op, bgezl_op,
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* bltzal_op, bgezal_op, bltzall_op, bgezall_op.
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*/
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case bcond_op:
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switch (insn.i_format.rt) {
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case bltz_op:
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case bltzl_op:
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case bgez_op:
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case bgezl_op:
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case bltzal_op:
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case bltzall_op:
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case bgezal_op:
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case bgezall_op:
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case bposge32_op:
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return 1;
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}
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break;
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/*
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* These are unconditional and in j_format.
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*/
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case jal_op:
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case j_op:
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case beq_op:
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case beql_op:
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case bne_op:
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case bnel_op:
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case blez_op: /* not really i_format */
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case blezl_op:
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case bgtz_op:
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case bgtzl_op:
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return 1;
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/*
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* And now the FPA/cp1 branch instructions.
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*/
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case cop1_op:
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#ifdef CONFIG_CPU_CAVIUM_OCTEON
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case lwc2_op: /* This is bbit0 on Octeon */
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case ldc2_op: /* This is bbit032 on Octeon */
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case swc2_op: /* This is bbit1 on Octeon */
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case sdc2_op: /* This is bbit132 on Octeon */
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#endif
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return 1;
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}
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return 0;
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}
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#endif /* __PROBES_COMMON_H */
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