![Archit Taneja](/assets/img/avatar_default.png)
With the omapdss device model changes. omapdrm is required to call dssdriver's connect() op to register a panel. This is currently done in omap_modeset_init() A call to connect() can fail if the omapdss panels or the encoders(HDMI/DPI) they connect to have some resource(like regulators, I2C adapter) missing. If this happens, the correct approach is to defer omapdrm's probe. omapdrm currently ignores those panels which return a non zero value when connected. This could result in omapdrm ignoring all panels on an omap board. The right approach would be for omapdrm to request for probe deferral when a panel's connect op returns -EPROBE_DEFER. In order to do this, we need to call connect() much earlier during omapdrm's probe to prevent too many things are already done by then. We now connect the panels during pdev_probe(), before anything else is initialized, so that we don't need to undo too many things if a defer was requested. Now when we enter omap_modeset_init(), we have a set of panels that have been connected. We now proceed with registering only those panels that are already connected. A special case has to be considered when no panels are available to connect when omapdrm probes. In this case too, we defer probe and expect that a panel will be available to connect the next time. Checking whether the panel has a driver or whether it has get_timing/read_edid ops in omap_modeset_init() are redundant with the new display model. These can be removed since a dssdev device will always have a driver associated with it, and all dssdev drivers have a get_timings op. This will mainly fix cases when omapdrm is built-in the kernel, since that's generally where resources like regulators or I2C are unavailable because of probe order dependencies. In particular this fixes boot with omapdrm built-in on an omap4 panda ES board. The regulators used by HDMI(provided by I2C based TWL regulators) aren't initialized because I2C isn't initialized, I2C isn't initialized as it's pins are not configured because pinctrl is yet to probe. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
695 lines
18 KiB
C
695 lines
18 KiB
C
/*
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* drivers/gpu/drm/omapdrm/omap_crtc.c
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*
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* Copyright (C) 2011 Texas Instruments
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* Author: Rob Clark <rob@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "omap_drv.h"
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#include <drm/drm_mode.h>
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#include "drm_crtc.h"
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#include "drm_crtc_helper.h"
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#define to_omap_crtc(x) container_of(x, struct omap_crtc, base)
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struct omap_crtc {
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struct drm_crtc base;
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struct drm_plane *plane;
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const char *name;
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int pipe;
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enum omap_channel channel;
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struct omap_overlay_manager_info info;
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/*
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* Temporary: eventually this will go away, but it is needed
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* for now to keep the output's happy. (They only need
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* mgr->id.) Eventually this will be replaced w/ something
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* more common-panel-framework-y
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*/
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struct omap_overlay_manager *mgr;
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struct omap_video_timings timings;
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bool enabled;
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bool full_update;
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struct omap_drm_apply apply;
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struct omap_drm_irq apply_irq;
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struct omap_drm_irq error_irq;
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/* list of in-progress apply's: */
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struct list_head pending_applies;
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/* list of queued apply's: */
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struct list_head queued_applies;
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/* for handling queued and in-progress applies: */
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struct work_struct apply_work;
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/* if there is a pending flip, these will be non-null: */
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struct drm_pending_vblank_event *event;
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struct drm_framebuffer *old_fb;
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/* for handling page flips without caring about what
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* the callback is called from. Possibly we should just
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* make omap_gem always call the cb from the worker so
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* we don't have to care about this..
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*
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* XXX maybe fold into apply_work??
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*/
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struct work_struct page_flip_work;
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};
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uint32_t pipe2vbl(struct drm_crtc *crtc)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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return dispc_mgr_get_vsync_irq(omap_crtc->channel);
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}
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/*
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* Manager-ops, callbacks from output when they need to configure
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* the upstream part of the video pipe.
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*
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* Most of these we can ignore until we add support for command-mode
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* panels.. for video-mode the crtc-helpers already do an adequate
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* job of sequencing the setup of the video pipe in the proper order
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*/
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/* ovl-mgr-id -> crtc */
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static struct omap_crtc *omap_crtcs[8];
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/* we can probably ignore these until we support command-mode panels: */
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static int omap_crtc_connect(struct omap_overlay_manager *mgr,
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struct omap_dss_device *dst)
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{
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if (mgr->output)
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return -EINVAL;
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if ((mgr->supported_outputs & dst->id) == 0)
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return -EINVAL;
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dst->manager = mgr;
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mgr->output = dst;
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return 0;
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}
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static void omap_crtc_disconnect(struct omap_overlay_manager *mgr,
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struct omap_dss_device *dst)
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{
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mgr->output->manager = NULL;
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mgr->output = NULL;
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}
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static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
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{
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}
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static int omap_crtc_enable(struct omap_overlay_manager *mgr)
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{
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return 0;
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}
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static void omap_crtc_disable(struct omap_overlay_manager *mgr)
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{
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}
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static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
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const struct omap_video_timings *timings)
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{
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struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
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DBG("%s", omap_crtc->name);
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omap_crtc->timings = *timings;
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omap_crtc->full_update = true;
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}
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static void omap_crtc_set_lcd_config(struct omap_overlay_manager *mgr,
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const struct dss_lcd_mgr_config *config)
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{
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struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
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DBG("%s", omap_crtc->name);
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dispc_mgr_set_lcd_config(omap_crtc->channel, config);
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}
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static int omap_crtc_register_framedone_handler(
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struct omap_overlay_manager *mgr,
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void (*handler)(void *), void *data)
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{
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return 0;
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}
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static void omap_crtc_unregister_framedone_handler(
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struct omap_overlay_manager *mgr,
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void (*handler)(void *), void *data)
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{
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}
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static const struct dss_mgr_ops mgr_ops = {
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.connect = omap_crtc_connect,
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.disconnect = omap_crtc_disconnect,
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.start_update = omap_crtc_start_update,
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.enable = omap_crtc_enable,
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.disable = omap_crtc_disable,
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.set_timings = omap_crtc_set_timings,
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.set_lcd_config = omap_crtc_set_lcd_config,
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.register_framedone_handler = omap_crtc_register_framedone_handler,
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.unregister_framedone_handler = omap_crtc_unregister_framedone_handler,
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};
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/*
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* CRTC funcs:
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*/
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static void omap_crtc_destroy(struct drm_crtc *crtc)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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DBG("%s", omap_crtc->name);
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WARN_ON(omap_crtc->apply_irq.registered);
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omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
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omap_crtc->plane->funcs->destroy(omap_crtc->plane);
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drm_crtc_cleanup(crtc);
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kfree(omap_crtc);
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}
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static void omap_crtc_dpms(struct drm_crtc *crtc, int mode)
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{
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struct omap_drm_private *priv = crtc->dev->dev_private;
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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bool enabled = (mode == DRM_MODE_DPMS_ON);
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int i;
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DBG("%s: %d", omap_crtc->name, mode);
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if (enabled != omap_crtc->enabled) {
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omap_crtc->enabled = enabled;
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omap_crtc->full_update = true;
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omap_crtc_apply(crtc, &omap_crtc->apply);
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/* also enable our private plane: */
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WARN_ON(omap_plane_dpms(omap_crtc->plane, mode));
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/* and any attached overlay planes: */
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for (i = 0; i < priv->num_planes; i++) {
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struct drm_plane *plane = priv->planes[i];
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if (plane->crtc == crtc)
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WARN_ON(omap_plane_dpms(plane, mode));
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}
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}
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}
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static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
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const struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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return true;
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}
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static int omap_crtc_mode_set(struct drm_crtc *crtc,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode,
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int x, int y,
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struct drm_framebuffer *old_fb)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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mode = adjusted_mode;
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DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
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omap_crtc->name, mode->base.id, mode->name,
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mode->vrefresh, mode->clock,
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mode->hdisplay, mode->hsync_start,
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mode->hsync_end, mode->htotal,
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mode->vdisplay, mode->vsync_start,
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mode->vsync_end, mode->vtotal,
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mode->type, mode->flags);
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copy_timings_drm_to_omap(&omap_crtc->timings, mode);
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omap_crtc->full_update = true;
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return omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
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0, 0, mode->hdisplay, mode->vdisplay,
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x << 16, y << 16,
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mode->hdisplay << 16, mode->vdisplay << 16,
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NULL, NULL);
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}
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static void omap_crtc_prepare(struct drm_crtc *crtc)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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DBG("%s", omap_crtc->name);
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omap_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
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}
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static void omap_crtc_commit(struct drm_crtc *crtc)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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DBG("%s", omap_crtc->name);
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omap_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
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}
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static int omap_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
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struct drm_framebuffer *old_fb)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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struct drm_plane *plane = omap_crtc->plane;
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struct drm_display_mode *mode = &crtc->mode;
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return omap_plane_mode_set(plane, crtc, crtc->fb,
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0, 0, mode->hdisplay, mode->vdisplay,
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x << 16, y << 16,
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mode->hdisplay << 16, mode->vdisplay << 16,
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NULL, NULL);
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}
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static void vblank_cb(void *arg)
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{
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struct drm_crtc *crtc = arg;
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struct drm_device *dev = crtc->dev;
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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unsigned long flags;
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spin_lock_irqsave(&dev->event_lock, flags);
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/* wakeup userspace */
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if (omap_crtc->event)
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drm_send_vblank_event(dev, omap_crtc->pipe, omap_crtc->event);
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omap_crtc->event = NULL;
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omap_crtc->old_fb = NULL;
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spin_unlock_irqrestore(&dev->event_lock, flags);
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}
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static void page_flip_worker(struct work_struct *work)
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{
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struct omap_crtc *omap_crtc =
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container_of(work, struct omap_crtc, page_flip_work);
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struct drm_crtc *crtc = &omap_crtc->base;
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struct drm_display_mode *mode = &crtc->mode;
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struct drm_gem_object *bo;
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mutex_lock(&crtc->mutex);
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omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
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0, 0, mode->hdisplay, mode->vdisplay,
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crtc->x << 16, crtc->y << 16,
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mode->hdisplay << 16, mode->vdisplay << 16,
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vblank_cb, crtc);
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mutex_unlock(&crtc->mutex);
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bo = omap_framebuffer_bo(crtc->fb, 0);
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drm_gem_object_unreference_unlocked(bo);
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}
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static void page_flip_cb(void *arg)
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{
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struct drm_crtc *crtc = arg;
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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struct omap_drm_private *priv = crtc->dev->dev_private;
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/* avoid assumptions about what ctxt we are called from: */
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queue_work(priv->wq, &omap_crtc->page_flip_work);
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}
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static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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struct drm_pending_vblank_event *event,
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uint32_t page_flip_flags)
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{
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struct drm_device *dev = crtc->dev;
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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struct drm_gem_object *bo;
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DBG("%d -> %d (event=%p)", crtc->fb ? crtc->fb->base.id : -1,
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fb->base.id, event);
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if (omap_crtc->old_fb) {
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dev_err(dev->dev, "already a pending flip\n");
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return -EINVAL;
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}
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omap_crtc->event = event;
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crtc->fb = fb;
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/*
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* Hold a reference temporarily until the crtc is updated
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* and takes the reference to the bo. This avoids it
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* getting freed from under us:
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*/
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bo = omap_framebuffer_bo(fb, 0);
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drm_gem_object_reference(bo);
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omap_gem_op_async(bo, OMAP_GEM_READ, page_flip_cb, crtc);
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return 0;
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}
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static int omap_crtc_set_property(struct drm_crtc *crtc,
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struct drm_property *property, uint64_t val)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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struct omap_drm_private *priv = crtc->dev->dev_private;
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if (property == priv->rotation_prop) {
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crtc->invert_dimensions =
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!!(val & ((1LL << DRM_ROTATE_90) | (1LL << DRM_ROTATE_270)));
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}
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return omap_plane_set_property(omap_crtc->plane, property, val);
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}
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static const struct drm_crtc_funcs omap_crtc_funcs = {
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.set_config = drm_crtc_helper_set_config,
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.destroy = omap_crtc_destroy,
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.page_flip = omap_crtc_page_flip_locked,
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.set_property = omap_crtc_set_property,
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};
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static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
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.dpms = omap_crtc_dpms,
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.mode_fixup = omap_crtc_mode_fixup,
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.mode_set = omap_crtc_mode_set,
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.prepare = omap_crtc_prepare,
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.commit = omap_crtc_commit,
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.mode_set_base = omap_crtc_mode_set_base,
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};
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const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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return &omap_crtc->timings;
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}
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enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)
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{
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struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
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return omap_crtc->channel;
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}
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static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
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{
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struct omap_crtc *omap_crtc =
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container_of(irq, struct omap_crtc, error_irq);
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struct drm_crtc *crtc = &omap_crtc->base;
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DRM_ERROR("%s: errors: %08x\n", omap_crtc->name, irqstatus);
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/* avoid getting in a flood, unregister the irq until next vblank */
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__omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
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}
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static void omap_crtc_apply_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
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{
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struct omap_crtc *omap_crtc =
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container_of(irq, struct omap_crtc, apply_irq);
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struct drm_crtc *crtc = &omap_crtc->base;
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if (!omap_crtc->error_irq.registered)
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__omap_irq_register(crtc->dev, &omap_crtc->error_irq);
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if (!dispc_mgr_go_busy(omap_crtc->channel)) {
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struct omap_drm_private *priv =
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crtc->dev->dev_private;
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DBG("%s: apply done", omap_crtc->name);
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__omap_irq_unregister(crtc->dev, &omap_crtc->apply_irq);
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queue_work(priv->wq, &omap_crtc->apply_work);
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}
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}
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static void apply_worker(struct work_struct *work)
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{
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struct omap_crtc *omap_crtc =
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container_of(work, struct omap_crtc, apply_work);
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struct drm_crtc *crtc = &omap_crtc->base;
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struct drm_device *dev = crtc->dev;
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struct omap_drm_apply *apply, *n;
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bool need_apply;
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/*
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* Synchronize everything on mode_config.mutex, to keep
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* the callbacks and list modification all serialized
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* with respect to modesetting ioctls from userspace.
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*/
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mutex_lock(&crtc->mutex);
|
|
dispc_runtime_get();
|
|
|
|
/*
|
|
* If we are still pending a previous update, wait.. when the
|
|
* pending update completes, we get kicked again.
|
|
*/
|
|
if (omap_crtc->apply_irq.registered)
|
|
goto out;
|
|
|
|
/* finish up previous apply's: */
|
|
list_for_each_entry_safe(apply, n,
|
|
&omap_crtc->pending_applies, pending_node) {
|
|
apply->post_apply(apply);
|
|
list_del(&apply->pending_node);
|
|
}
|
|
|
|
need_apply = !list_empty(&omap_crtc->queued_applies);
|
|
|
|
/* then handle the next round of of queued apply's: */
|
|
list_for_each_entry_safe(apply, n,
|
|
&omap_crtc->queued_applies, queued_node) {
|
|
apply->pre_apply(apply);
|
|
list_del(&apply->queued_node);
|
|
apply->queued = false;
|
|
list_add_tail(&apply->pending_node,
|
|
&omap_crtc->pending_applies);
|
|
}
|
|
|
|
if (need_apply) {
|
|
enum omap_channel channel = omap_crtc->channel;
|
|
|
|
DBG("%s: GO", omap_crtc->name);
|
|
|
|
if (dispc_mgr_is_enabled(channel)) {
|
|
omap_irq_register(dev, &omap_crtc->apply_irq);
|
|
dispc_mgr_go(channel);
|
|
} else {
|
|
struct omap_drm_private *priv = dev->dev_private;
|
|
queue_work(priv->wq, &omap_crtc->apply_work);
|
|
}
|
|
}
|
|
|
|
out:
|
|
dispc_runtime_put();
|
|
mutex_unlock(&crtc->mutex);
|
|
}
|
|
|
|
int omap_crtc_apply(struct drm_crtc *crtc,
|
|
struct omap_drm_apply *apply)
|
|
{
|
|
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
|
|
|
|
WARN_ON(!mutex_is_locked(&crtc->mutex));
|
|
|
|
/* no need to queue it again if it is already queued: */
|
|
if (apply->queued)
|
|
return 0;
|
|
|
|
apply->queued = true;
|
|
list_add_tail(&apply->queued_node, &omap_crtc->queued_applies);
|
|
|
|
/*
|
|
* If there are no currently pending updates, then go ahead and
|
|
* kick the worker immediately, otherwise it will run again when
|
|
* the current update finishes.
|
|
*/
|
|
if (list_empty(&omap_crtc->pending_applies)) {
|
|
struct omap_drm_private *priv = crtc->dev->dev_private;
|
|
queue_work(priv->wq, &omap_crtc->apply_work);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* called only from apply */
|
|
static void set_enabled(struct drm_crtc *crtc, bool enable)
|
|
{
|
|
struct drm_device *dev = crtc->dev;
|
|
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
|
|
enum omap_channel channel = omap_crtc->channel;
|
|
struct omap_irq_wait *wait = NULL;
|
|
|
|
if (dispc_mgr_is_enabled(channel) == enable)
|
|
return;
|
|
|
|
/* ignore sync-lost irqs during enable/disable */
|
|
omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
|
|
|
|
if (dispc_mgr_get_framedone_irq(channel)) {
|
|
if (!enable) {
|
|
wait = omap_irq_wait_init(dev,
|
|
dispc_mgr_get_framedone_irq(channel), 1);
|
|
}
|
|
} else {
|
|
/*
|
|
* When we disable digit output, we need to wait until fields
|
|
* are done. Otherwise the DSS is still working, and turning
|
|
* off the clocks prevents DSS from going to OFF mode. And when
|
|
* enabling, we need to wait for the extra sync losts
|
|
*/
|
|
wait = omap_irq_wait_init(dev,
|
|
dispc_mgr_get_vsync_irq(channel), 2);
|
|
}
|
|
|
|
dispc_mgr_enable(channel, enable);
|
|
|
|
if (wait) {
|
|
int ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
|
|
if (ret) {
|
|
dev_err(dev->dev, "%s: timeout waiting for %s\n",
|
|
omap_crtc->name, enable ? "enable" : "disable");
|
|
}
|
|
}
|
|
|
|
omap_irq_register(crtc->dev, &omap_crtc->error_irq);
|
|
}
|
|
|
|
static void omap_crtc_pre_apply(struct omap_drm_apply *apply)
|
|
{
|
|
struct omap_crtc *omap_crtc =
|
|
container_of(apply, struct omap_crtc, apply);
|
|
struct drm_crtc *crtc = &omap_crtc->base;
|
|
struct drm_encoder *encoder = NULL;
|
|
|
|
DBG("%s: enabled=%d, full=%d", omap_crtc->name,
|
|
omap_crtc->enabled, omap_crtc->full_update);
|
|
|
|
if (omap_crtc->full_update) {
|
|
struct omap_drm_private *priv = crtc->dev->dev_private;
|
|
int i;
|
|
for (i = 0; i < priv->num_encoders; i++) {
|
|
if (priv->encoders[i]->crtc == crtc) {
|
|
encoder = priv->encoders[i];
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (!omap_crtc->enabled) {
|
|
set_enabled(&omap_crtc->base, false);
|
|
if (encoder)
|
|
omap_encoder_set_enabled(encoder, false);
|
|
} else {
|
|
if (encoder) {
|
|
omap_encoder_set_enabled(encoder, false);
|
|
omap_encoder_update(encoder, omap_crtc->mgr,
|
|
&omap_crtc->timings);
|
|
omap_encoder_set_enabled(encoder, true);
|
|
omap_crtc->full_update = false;
|
|
}
|
|
|
|
dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
|
|
dispc_mgr_set_timings(omap_crtc->channel,
|
|
&omap_crtc->timings);
|
|
set_enabled(&omap_crtc->base, true);
|
|
}
|
|
|
|
omap_crtc->full_update = false;
|
|
}
|
|
|
|
static void omap_crtc_post_apply(struct omap_drm_apply *apply)
|
|
{
|
|
/* nothing needed for post-apply */
|
|
}
|
|
|
|
static const char *channel_names[] = {
|
|
[OMAP_DSS_CHANNEL_LCD] = "lcd",
|
|
[OMAP_DSS_CHANNEL_DIGIT] = "tv",
|
|
[OMAP_DSS_CHANNEL_LCD2] = "lcd2",
|
|
};
|
|
|
|
void omap_crtc_pre_init(void)
|
|
{
|
|
dss_install_mgr_ops(&mgr_ops);
|
|
}
|
|
|
|
void omap_crtc_pre_uninit(void)
|
|
{
|
|
dss_uninstall_mgr_ops();
|
|
}
|
|
|
|
/* initialize crtc */
|
|
struct drm_crtc *omap_crtc_init(struct drm_device *dev,
|
|
struct drm_plane *plane, enum omap_channel channel, int id)
|
|
{
|
|
struct drm_crtc *crtc = NULL;
|
|
struct omap_crtc *omap_crtc;
|
|
struct omap_overlay_manager_info *info;
|
|
|
|
DBG("%s", channel_names[channel]);
|
|
|
|
omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
|
|
if (!omap_crtc)
|
|
goto fail;
|
|
|
|
crtc = &omap_crtc->base;
|
|
|
|
INIT_WORK(&omap_crtc->page_flip_work, page_flip_worker);
|
|
INIT_WORK(&omap_crtc->apply_work, apply_worker);
|
|
|
|
INIT_LIST_HEAD(&omap_crtc->pending_applies);
|
|
INIT_LIST_HEAD(&omap_crtc->queued_applies);
|
|
|
|
omap_crtc->apply.pre_apply = omap_crtc_pre_apply;
|
|
omap_crtc->apply.post_apply = omap_crtc_post_apply;
|
|
|
|
omap_crtc->channel = channel;
|
|
omap_crtc->plane = plane;
|
|
omap_crtc->plane->crtc = crtc;
|
|
omap_crtc->name = channel_names[channel];
|
|
omap_crtc->pipe = id;
|
|
|
|
omap_crtc->apply_irq.irqmask = pipe2vbl(crtc);
|
|
omap_crtc->apply_irq.irq = omap_crtc_apply_irq;
|
|
|
|
omap_crtc->error_irq.irqmask =
|
|
dispc_mgr_get_sync_lost_irq(channel);
|
|
omap_crtc->error_irq.irq = omap_crtc_error_irq;
|
|
omap_irq_register(dev, &omap_crtc->error_irq);
|
|
|
|
/* temporary: */
|
|
omap_crtc->mgr = omap_dss_get_overlay_manager(channel);
|
|
|
|
/* TODO: fix hard-coded setup.. add properties! */
|
|
info = &omap_crtc->info;
|
|
info->default_color = 0x00000000;
|
|
info->trans_key = 0x00000000;
|
|
info->trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
|
|
info->trans_enabled = false;
|
|
|
|
drm_crtc_init(dev, crtc, &omap_crtc_funcs);
|
|
drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
|
|
|
|
omap_plane_install_properties(omap_crtc->plane, &crtc->base);
|
|
|
|
omap_crtcs[channel] = omap_crtc;
|
|
|
|
return crtc;
|
|
|
|
fail:
|
|
if (crtc)
|
|
omap_crtc_destroy(crtc);
|
|
|
|
return NULL;
|
|
}
|