![Wolfram Sang](/assets/img/avatar_default.png)
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
656 lines
16 KiB
C
656 lines
16 KiB
C
/* Realtek PCI-Express Memstick Card Interface driver
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*
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* Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2, or (at your option) any
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* later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*
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* Author:
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* Wei WANG <wei_wang@realsil.com.cn>
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*/
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#include <linux/module.h>
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#include <linux/highmem.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/memstick.h>
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#include <linux/mfd/rtsx_pci.h>
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#include <asm/unaligned.h>
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struct realtek_pci_ms {
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struct platform_device *pdev;
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struct rtsx_pcr *pcr;
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struct memstick_host *msh;
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struct memstick_request *req;
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struct mutex host_mutex;
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struct work_struct handle_req;
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u8 ssc_depth;
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unsigned int clock;
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unsigned char ifmode;
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bool eject;
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};
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static inline struct device *ms_dev(struct realtek_pci_ms *host)
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{
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return &(host->pdev->dev);
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}
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static inline void ms_clear_error(struct realtek_pci_ms *host)
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{
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rtsx_pci_write_register(host->pcr, CARD_STOP,
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MS_STOP | MS_CLR_ERR, MS_STOP | MS_CLR_ERR);
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}
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#ifdef DEBUG
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static void ms_print_debug_regs(struct realtek_pci_ms *host)
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{
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struct rtsx_pcr *pcr = host->pcr;
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u16 i;
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u8 *ptr;
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/* Print MS host internal registers */
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rtsx_pci_init_cmd(pcr);
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for (i = 0xFD40; i <= 0xFD44; i++)
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rtsx_pci_add_cmd(pcr, READ_REG_CMD, i, 0, 0);
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for (i = 0xFD52; i <= 0xFD69; i++)
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rtsx_pci_add_cmd(pcr, READ_REG_CMD, i, 0, 0);
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rtsx_pci_send_cmd(pcr, 100);
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ptr = rtsx_pci_get_cmd_data(pcr);
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for (i = 0xFD40; i <= 0xFD44; i++)
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dev_dbg(ms_dev(host), "0x%04X: 0x%02x\n", i, *(ptr++));
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for (i = 0xFD52; i <= 0xFD69; i++)
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dev_dbg(ms_dev(host), "0x%04X: 0x%02x\n", i, *(ptr++));
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}
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#else
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#define ms_print_debug_regs(host)
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#endif
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static int ms_power_on(struct realtek_pci_ms *host)
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{
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struct rtsx_pcr *pcr = host->pcr;
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int err;
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rtsx_pci_init_cmd(pcr);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_SELECT, 0x07, MS_MOD_SEL);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_SHARE_MODE,
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CARD_SHARE_MASK, CARD_SHARE_48_MS);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN,
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MS_CLK_EN, MS_CLK_EN);
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err = rtsx_pci_send_cmd(pcr, 100);
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if (err < 0)
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return err;
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err = rtsx_pci_card_pull_ctl_enable(pcr, RTSX_MS_CARD);
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if (err < 0)
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return err;
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err = rtsx_pci_card_power_on(pcr, RTSX_MS_CARD);
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if (err < 0)
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return err;
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/* Wait ms power stable */
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msleep(150);
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err = rtsx_pci_write_register(pcr, CARD_OE,
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MS_OUTPUT_EN, MS_OUTPUT_EN);
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if (err < 0)
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return err;
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return 0;
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}
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static int ms_power_off(struct realtek_pci_ms *host)
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{
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struct rtsx_pcr *pcr = host->pcr;
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int err;
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rtsx_pci_init_cmd(pcr);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, MS_CLK_EN, 0);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_OE, MS_OUTPUT_EN, 0);
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err = rtsx_pci_send_cmd(pcr, 100);
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if (err < 0)
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return err;
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err = rtsx_pci_card_power_off(pcr, RTSX_MS_CARD);
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if (err < 0)
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return err;
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return rtsx_pci_card_pull_ctl_disable(pcr, RTSX_MS_CARD);
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}
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static int ms_transfer_data(struct realtek_pci_ms *host, unsigned char data_dir,
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u8 tpc, u8 cfg, struct scatterlist *sg)
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{
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struct rtsx_pcr *pcr = host->pcr;
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int err;
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unsigned int length = sg->length;
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u16 sec_cnt = (u16)(length / 512);
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u8 val, trans_mode, dma_dir;
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struct memstick_dev *card = host->msh->card;
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bool pro_card = card->id.type == MEMSTICK_TYPE_PRO;
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dev_dbg(ms_dev(host), "%s: tpc = 0x%02x, data_dir = %s, length = %d\n",
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__func__, tpc, (data_dir == READ) ? "READ" : "WRITE",
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length);
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if (data_dir == READ) {
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dma_dir = DMA_DIR_FROM_CARD;
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trans_mode = pro_card ? MS_TM_AUTO_READ : MS_TM_NORMAL_READ;
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} else {
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dma_dir = DMA_DIR_TO_CARD;
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trans_mode = pro_card ? MS_TM_AUTO_WRITE : MS_TM_NORMAL_WRITE;
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}
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rtsx_pci_init_cmd(pcr);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
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if (pro_card) {
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_SECTOR_CNT_H,
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0xFF, (u8)(sec_cnt >> 8));
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_SECTOR_CNT_L,
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0xFF, (u8)sec_cnt);
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}
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0,
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DMA_DONE_INT, DMA_DONE_INT);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC3, 0xFF, (u8)(length >> 24));
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC2, 0xFF, (u8)(length >> 16));
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC1, 0xFF, (u8)(length >> 8));
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC0, 0xFF, (u8)length);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMACTL,
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0x03 | DMA_PACK_SIZE_MASK, dma_dir | DMA_EN | DMA_512);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE,
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0x01, RING_BUFFER);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANSFER,
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0xFF, MS_TRANSFER_START | trans_mode);
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rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, MS_TRANSFER,
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MS_TRANSFER_END, MS_TRANSFER_END);
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rtsx_pci_send_cmd_no_wait(pcr);
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err = rtsx_pci_transfer_data(pcr, sg, 1, data_dir == READ, 10000);
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if (err < 0) {
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ms_clear_error(host);
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return err;
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}
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rtsx_pci_read_register(pcr, MS_TRANS_CFG, &val);
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if (pro_card) {
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if (val & (MS_INT_CMDNK | MS_INT_ERR |
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MS_CRC16_ERR | MS_RDY_TIMEOUT))
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return -EIO;
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} else {
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if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT))
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return -EIO;
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}
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return 0;
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}
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static int ms_write_bytes(struct realtek_pci_ms *host, u8 tpc,
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u8 cfg, u8 cnt, u8 *data, u8 *int_reg)
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{
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struct rtsx_pcr *pcr = host->pcr;
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int err, i;
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dev_dbg(ms_dev(host), "%s: tpc = 0x%02x\n", __func__, tpc);
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if (!data)
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return -EINVAL;
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rtsx_pci_init_cmd(pcr);
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for (i = 0; i < cnt; i++)
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,
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PPBUF_BASE2 + i, 0xFF, data[i]);
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if (cnt % 2)
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,
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PPBUF_BASE2 + i, 0xFF, 0xFF);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE,
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0x01, PINGPONG_BUFFER);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANSFER,
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0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
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rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, MS_TRANSFER,
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MS_TRANSFER_END, MS_TRANSFER_END);
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if (int_reg)
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rtsx_pci_add_cmd(pcr, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
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err = rtsx_pci_send_cmd(pcr, 5000);
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if (err < 0) {
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u8 val;
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rtsx_pci_read_register(pcr, MS_TRANS_CFG, &val);
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dev_dbg(ms_dev(host), "MS_TRANS_CFG: 0x%02x\n", val);
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if (int_reg)
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*int_reg = val & 0x0F;
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ms_print_debug_regs(host);
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ms_clear_error(host);
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if (!(tpc & 0x08)) {
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if (val & MS_CRC16_ERR)
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return -EIO;
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} else {
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if (!(val & 0x80)) {
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if (val & (MS_INT_ERR | MS_INT_CMDNK))
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return -EIO;
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}
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}
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return -ETIMEDOUT;
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}
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if (int_reg) {
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u8 *ptr = rtsx_pci_get_cmd_data(pcr) + 1;
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*int_reg = *ptr & 0x0F;
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}
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return 0;
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}
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static int ms_read_bytes(struct realtek_pci_ms *host, u8 tpc,
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u8 cfg, u8 cnt, u8 *data, u8 *int_reg)
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{
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struct rtsx_pcr *pcr = host->pcr;
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int err, i;
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u8 *ptr;
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dev_dbg(ms_dev(host), "%s: tpc = 0x%02x\n", __func__, tpc);
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if (!data)
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return -EINVAL;
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rtsx_pci_init_cmd(pcr);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE,
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0x01, PINGPONG_BUFFER);
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, MS_TRANSFER,
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0xFF, MS_TRANSFER_START | MS_TM_READ_BYTES);
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rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, MS_TRANSFER,
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MS_TRANSFER_END, MS_TRANSFER_END);
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for (i = 0; i < cnt - 1; i++)
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rtsx_pci_add_cmd(pcr, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
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if (cnt % 2)
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rtsx_pci_add_cmd(pcr, READ_REG_CMD, PPBUF_BASE2 + cnt, 0, 0);
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else
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rtsx_pci_add_cmd(pcr, READ_REG_CMD,
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PPBUF_BASE2 + cnt - 1, 0, 0);
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if (int_reg)
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rtsx_pci_add_cmd(pcr, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
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err = rtsx_pci_send_cmd(pcr, 5000);
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if (err < 0) {
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u8 val;
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rtsx_pci_read_register(pcr, MS_TRANS_CFG, &val);
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dev_dbg(ms_dev(host), "MS_TRANS_CFG: 0x%02x\n", val);
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if (int_reg)
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*int_reg = val & 0x0F;
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ms_print_debug_regs(host);
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ms_clear_error(host);
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if (!(tpc & 0x08)) {
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if (val & MS_CRC16_ERR)
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return -EIO;
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} else {
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if (!(val & 0x80)) {
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if (val & (MS_INT_ERR | MS_INT_CMDNK))
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return -EIO;
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}
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}
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return -ETIMEDOUT;
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}
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ptr = rtsx_pci_get_cmd_data(pcr) + 1;
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for (i = 0; i < cnt; i++)
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data[i] = *ptr++;
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if (int_reg)
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*int_reg = *ptr & 0x0F;
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return 0;
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}
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static int rtsx_pci_ms_issue_cmd(struct realtek_pci_ms *host)
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{
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struct memstick_request *req = host->req;
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int err = 0;
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u8 cfg = 0, int_reg;
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dev_dbg(ms_dev(host), "%s\n", __func__);
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if (req->need_card_int) {
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if (host->ifmode != MEMSTICK_SERIAL)
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cfg = WAIT_INT;
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}
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if (req->long_data) {
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err = ms_transfer_data(host, req->data_dir,
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req->tpc, cfg, &(req->sg));
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} else {
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if (req->data_dir == READ) {
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err = ms_read_bytes(host, req->tpc, cfg,
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req->data_len, req->data, &int_reg);
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} else {
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err = ms_write_bytes(host, req->tpc, cfg,
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req->data_len, req->data, &int_reg);
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}
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}
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if (err < 0)
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return err;
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if (req->need_card_int && (host->ifmode == MEMSTICK_SERIAL)) {
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err = ms_read_bytes(host, MS_TPC_GET_INT,
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NO_WAIT_INT, 1, &int_reg, NULL);
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if (err < 0)
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return err;
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}
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if (req->need_card_int) {
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dev_dbg(ms_dev(host), "int_reg: 0x%02x\n", int_reg);
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if (int_reg & MS_INT_CMDNK)
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req->int_reg |= MEMSTICK_INT_CMDNAK;
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if (int_reg & MS_INT_BREQ)
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req->int_reg |= MEMSTICK_INT_BREQ;
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if (int_reg & MS_INT_ERR)
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req->int_reg |= MEMSTICK_INT_ERR;
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if (int_reg & MS_INT_CED)
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req->int_reg |= MEMSTICK_INT_CED;
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}
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return 0;
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}
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static void rtsx_pci_ms_handle_req(struct work_struct *work)
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{
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struct realtek_pci_ms *host = container_of(work,
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struct realtek_pci_ms, handle_req);
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struct rtsx_pcr *pcr = host->pcr;
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struct memstick_host *msh = host->msh;
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int rc;
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mutex_lock(&pcr->pcr_mutex);
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rtsx_pci_start_run(pcr);
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rtsx_pci_switch_clock(host->pcr, host->clock, host->ssc_depth,
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false, true, false);
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rtsx_pci_write_register(pcr, CARD_SELECT, 0x07, MS_MOD_SEL);
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rtsx_pci_write_register(pcr, CARD_SHARE_MODE,
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CARD_SHARE_MASK, CARD_SHARE_48_MS);
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if (!host->req) {
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do {
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rc = memstick_next_req(msh, &host->req);
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dev_dbg(ms_dev(host), "next req %d\n", rc);
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if (!rc)
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host->req->error = rtsx_pci_ms_issue_cmd(host);
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} while (!rc);
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}
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mutex_unlock(&pcr->pcr_mutex);
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}
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static void rtsx_pci_ms_request(struct memstick_host *msh)
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{
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struct realtek_pci_ms *host = memstick_priv(msh);
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dev_dbg(ms_dev(host), "--> %s\n", __func__);
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if (rtsx_pci_card_exclusive_check(host->pcr, RTSX_MS_CARD))
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return;
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schedule_work(&host->handle_req);
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}
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static int rtsx_pci_ms_set_param(struct memstick_host *msh,
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enum memstick_param param, int value)
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{
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struct realtek_pci_ms *host = memstick_priv(msh);
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struct rtsx_pcr *pcr = host->pcr;
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unsigned int clock = 0;
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u8 ssc_depth = 0;
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int err;
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dev_dbg(ms_dev(host), "%s: param = %d, value = %d\n",
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__func__, param, value);
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err = rtsx_pci_card_exclusive_check(host->pcr, RTSX_MS_CARD);
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if (err)
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return err;
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|
switch (param) {
|
|
case MEMSTICK_POWER:
|
|
if (value == MEMSTICK_POWER_ON)
|
|
err = ms_power_on(host);
|
|
else if (value == MEMSTICK_POWER_OFF)
|
|
err = ms_power_off(host);
|
|
else
|
|
return -EINVAL;
|
|
break;
|
|
|
|
case MEMSTICK_INTERFACE:
|
|
if (value == MEMSTICK_SERIAL) {
|
|
clock = 19000000;
|
|
ssc_depth = RTSX_SSC_DEPTH_500K;
|
|
|
|
err = rtsx_pci_write_register(pcr, MS_CFG, 0x58,
|
|
MS_BUS_WIDTH_1 | PUSH_TIME_DEFAULT);
|
|
if (err < 0)
|
|
return err;
|
|
} else if (value == MEMSTICK_PAR4) {
|
|
clock = 39000000;
|
|
ssc_depth = RTSX_SSC_DEPTH_1M;
|
|
|
|
err = rtsx_pci_write_register(pcr, MS_CFG,
|
|
0x58, MS_BUS_WIDTH_4 | PUSH_TIME_ODD);
|
|
if (err < 0)
|
|
return err;
|
|
} else {
|
|
return -EINVAL;
|
|
}
|
|
|
|
err = rtsx_pci_switch_clock(pcr, clock,
|
|
ssc_depth, false, true, false);
|
|
if (err < 0)
|
|
return err;
|
|
|
|
host->ssc_depth = ssc_depth;
|
|
host->clock = clock;
|
|
host->ifmode = value;
|
|
break;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
static int rtsx_pci_ms_suspend(struct platform_device *pdev, pm_message_t state)
|
|
{
|
|
struct realtek_pci_ms *host = platform_get_drvdata(pdev);
|
|
struct memstick_host *msh = host->msh;
|
|
|
|
dev_dbg(ms_dev(host), "--> %s\n", __func__);
|
|
|
|
memstick_suspend_host(msh);
|
|
return 0;
|
|
}
|
|
|
|
static int rtsx_pci_ms_resume(struct platform_device *pdev)
|
|
{
|
|
struct realtek_pci_ms *host = platform_get_drvdata(pdev);
|
|
struct memstick_host *msh = host->msh;
|
|
|
|
dev_dbg(ms_dev(host), "--> %s\n", __func__);
|
|
|
|
memstick_resume_host(msh);
|
|
return 0;
|
|
}
|
|
|
|
#else /* CONFIG_PM */
|
|
|
|
#define rtsx_pci_ms_suspend NULL
|
|
#define rtsx_pci_ms_resume NULL
|
|
|
|
#endif /* CONFIG_PM */
|
|
|
|
static void rtsx_pci_ms_card_event(struct platform_device *pdev)
|
|
{
|
|
struct realtek_pci_ms *host = platform_get_drvdata(pdev);
|
|
|
|
memstick_detect_change(host->msh);
|
|
}
|
|
|
|
static int rtsx_pci_ms_drv_probe(struct platform_device *pdev)
|
|
{
|
|
struct memstick_host *msh;
|
|
struct realtek_pci_ms *host;
|
|
struct rtsx_pcr *pcr;
|
|
struct pcr_handle *handle = pdev->dev.platform_data;
|
|
int rc;
|
|
|
|
if (!handle)
|
|
return -ENXIO;
|
|
|
|
pcr = handle->pcr;
|
|
if (!pcr)
|
|
return -ENXIO;
|
|
|
|
dev_dbg(&(pdev->dev),
|
|
": Realtek PCI-E Memstick controller found\n");
|
|
|
|
msh = memstick_alloc_host(sizeof(*host), &pdev->dev);
|
|
if (!msh)
|
|
return -ENOMEM;
|
|
|
|
host = memstick_priv(msh);
|
|
host->pcr = pcr;
|
|
host->msh = msh;
|
|
host->pdev = pdev;
|
|
platform_set_drvdata(pdev, host);
|
|
pcr->slots[RTSX_MS_CARD].p_dev = pdev;
|
|
pcr->slots[RTSX_MS_CARD].card_event = rtsx_pci_ms_card_event;
|
|
|
|
mutex_init(&host->host_mutex);
|
|
|
|
INIT_WORK(&host->handle_req, rtsx_pci_ms_handle_req);
|
|
msh->request = rtsx_pci_ms_request;
|
|
msh->set_param = rtsx_pci_ms_set_param;
|
|
msh->caps = MEMSTICK_CAP_PAR4;
|
|
|
|
rc = memstick_add_host(msh);
|
|
if (rc) {
|
|
memstick_free_host(msh);
|
|
return rc;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int rtsx_pci_ms_drv_remove(struct platform_device *pdev)
|
|
{
|
|
struct realtek_pci_ms *host = platform_get_drvdata(pdev);
|
|
struct rtsx_pcr *pcr;
|
|
struct memstick_host *msh;
|
|
int rc;
|
|
|
|
if (!host)
|
|
return 0;
|
|
|
|
pcr = host->pcr;
|
|
pcr->slots[RTSX_MS_CARD].p_dev = NULL;
|
|
pcr->slots[RTSX_MS_CARD].card_event = NULL;
|
|
msh = host->msh;
|
|
host->eject = true;
|
|
cancel_work_sync(&host->handle_req);
|
|
|
|
mutex_lock(&host->host_mutex);
|
|
if (host->req) {
|
|
dev_dbg(&(pdev->dev),
|
|
"%s: Controller removed during transfer\n",
|
|
dev_name(&msh->dev));
|
|
|
|
rtsx_pci_complete_unfinished_transfer(pcr);
|
|
|
|
host->req->error = -ENOMEDIUM;
|
|
do {
|
|
rc = memstick_next_req(msh, &host->req);
|
|
if (!rc)
|
|
host->req->error = -ENOMEDIUM;
|
|
} while (!rc);
|
|
}
|
|
mutex_unlock(&host->host_mutex);
|
|
|
|
memstick_remove_host(msh);
|
|
memstick_free_host(msh);
|
|
|
|
dev_dbg(&(pdev->dev),
|
|
": Realtek PCI-E Memstick controller has been removed\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_device_id rtsx_pci_ms_ids[] = {
|
|
{
|
|
.name = DRV_NAME_RTSX_PCI_MS,
|
|
}, {
|
|
/* sentinel */
|
|
}
|
|
};
|
|
MODULE_DEVICE_TABLE(platform, rtsx_pci_ms_ids);
|
|
|
|
static struct platform_driver rtsx_pci_ms_driver = {
|
|
.probe = rtsx_pci_ms_drv_probe,
|
|
.remove = rtsx_pci_ms_drv_remove,
|
|
.id_table = rtsx_pci_ms_ids,
|
|
.suspend = rtsx_pci_ms_suspend,
|
|
.resume = rtsx_pci_ms_resume,
|
|
.driver = {
|
|
.name = DRV_NAME_RTSX_PCI_MS,
|
|
},
|
|
};
|
|
module_platform_driver(rtsx_pci_ms_driver);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_AUTHOR("Wei WANG <wei_wang@realsil.com.cn>");
|
|
MODULE_DESCRIPTION("Realtek PCI-E Memstick Card Host Driver");
|