ea27617637
On EXYNOS5440 there is DRAM on the 36-bit address range. Hence this patch converts the MAX_PHYSMEM_BITS macro to 36 if LPAE is enabled for the ARM architecture. The conventional section size on EXYNOS is 256M due to sparsemem. Since EXYNOS5440 has memory in multiples of 1G in 32-bit and 36-bit range, this has now been modified to 31. Signed-off-by: Subash Patel <subash.rp@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
28 lines
698 B
C
28 lines
698 B
C
/* linux/arch/arm/mach-exynos4/include/mach/memory.h
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*
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* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* EXYNOS4 - Memory definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_MEMORY_H
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#define __ASM_ARCH_MEMORY_H __FILE__
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#define PLAT_PHYS_OFFSET UL(0x40000000)
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#ifndef CONFIG_ARM_LPAE
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/* Maximum of 256MiB in one bank */
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#define MAX_PHYSMEM_BITS 32
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#define SECTION_SIZE_BITS 28
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#else
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#define MAX_PHYSMEM_BITS 36
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#define SECTION_SIZE_BITS 31
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#endif
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#endif /* __ASM_ARCH_MEMORY_H */
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