1d18c47c73
This patch adds support for the handling of the MMU faults (exception entry code introduced by a previous patch) and page table management. The user translation table is pointed to by TTBR0 and the kernel one (swapper_pg_dir) by TTBR1. There is no translation information shared or address space overlapping between user and kernel page tables. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
35 lines
1 KiB
C
35 lines
1 KiB
C
/*
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* Based on arch/arm/mm/copypage.c
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*
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* Copyright (C) 2002 Deep Blue Solutions Ltd, All Rights Reserved.
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/mm.h>
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#include <asm/page.h>
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#include <asm/cacheflush.h>
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void __cpu_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
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{
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copy_page(kto, kfrom);
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__flush_dcache_area(kto, PAGE_SIZE);
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}
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void __cpu_clear_user_page(void *kaddr, unsigned long vaddr)
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{
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clear_page(kaddr);
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}
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