282b583f75
The total number of SoC GPIOs is only used to compute the base GPIO number of th PCF8575 GPIO extender on the KZM9G board. As GPIO allocation became fully dynamic with DT, no other SH73A0 board will use the GPIO_NR macro. Move it to the KZM9G board file. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
92 lines
2.4 KiB
C
92 lines
2.4 KiB
C
#ifndef __ASM_SH73A0_H__
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#define __ASM_SH73A0_H__
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/* DMA slave IDs */
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enum {
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SHDMA_SLAVE_INVALID,
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SHDMA_SLAVE_SCIF0_TX,
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SHDMA_SLAVE_SCIF0_RX,
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SHDMA_SLAVE_SCIF1_TX,
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SHDMA_SLAVE_SCIF1_RX,
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SHDMA_SLAVE_SCIF2_TX,
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SHDMA_SLAVE_SCIF2_RX,
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SHDMA_SLAVE_SCIF3_TX,
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SHDMA_SLAVE_SCIF3_RX,
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SHDMA_SLAVE_SCIF4_TX,
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SHDMA_SLAVE_SCIF4_RX,
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SHDMA_SLAVE_SCIF5_TX,
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SHDMA_SLAVE_SCIF5_RX,
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SHDMA_SLAVE_SCIF6_TX,
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SHDMA_SLAVE_SCIF6_RX,
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SHDMA_SLAVE_SCIF7_TX,
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SHDMA_SLAVE_SCIF7_RX,
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SHDMA_SLAVE_SCIF8_TX,
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SHDMA_SLAVE_SCIF8_RX,
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SHDMA_SLAVE_SDHI0_TX,
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SHDMA_SLAVE_SDHI0_RX,
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SHDMA_SLAVE_SDHI1_TX,
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SHDMA_SLAVE_SDHI1_RX,
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SHDMA_SLAVE_SDHI2_TX,
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SHDMA_SLAVE_SDHI2_RX,
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SHDMA_SLAVE_MMCIF_TX,
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SHDMA_SLAVE_MMCIF_RX,
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SHDMA_SLAVE_FSI2A_TX,
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SHDMA_SLAVE_FSI2A_RX,
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SHDMA_SLAVE_FSI2B_TX,
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SHDMA_SLAVE_FSI2B_RX,
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SHDMA_SLAVE_FSI2C_TX,
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SHDMA_SLAVE_FSI2C_RX,
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SHDMA_SLAVE_FSI2D_RX,
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};
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/*
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* SH73A0 IRQ LOCATION TABLE
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*
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* 416 -----------------------------------------
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* IRQ0-IRQ15
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* 431 -----------------------------------------
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* ...
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* 448 -----------------------------------------
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* sh73a0-intcs
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* sh73a0-intca-irq-pins
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* 680 -----------------------------------------
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* ...
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* 700 -----------------------------------------
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* sh73a0-pint0
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* 731 -----------------------------------------
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* 732 -----------------------------------------
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* sh73a0-pint1
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* 739 -----------------------------------------
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* ...
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* 800 -----------------------------------------
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* IRQ16-IRQ31
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* 815 -----------------------------------------
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* ...
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* 928 -----------------------------------------
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* sh73a0-intca-irq-pins
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* 943 -----------------------------------------
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*/
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/* PINT interrupts are located at Linux IRQ 700 and up */
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#define SH73A0_PINT0_IRQ(irq) ((irq) + 700)
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#define SH73A0_PINT1_IRQ(irq) ((irq) + 732)
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extern void sh73a0_init_delay(void);
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extern void sh73a0_init_irq(void);
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extern void sh73a0_init_irq_dt(void);
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extern void sh73a0_map_io(void);
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extern void sh73a0_earlytimer_init(void);
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extern void sh73a0_add_early_devices(void);
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extern void sh73a0_add_standard_devices(void);
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extern void sh73a0_add_standard_devices_dt(void);
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extern void sh73a0_clock_init(void);
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extern void sh73a0_pinmux_init(void);
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extern void sh73a0_pm_init(void);
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extern struct clk sh73a0_extal1_clk;
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extern struct clk sh73a0_extal2_clk;
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extern struct clk sh73a0_extcki_clk;
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extern struct clk sh73a0_extalr_clk;
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extern struct smp_operations sh73a0_smp_ops;
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#endif /* __ASM_SH73A0_H__ */
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