54afbec0d5
The CoreNet Coherency Fabric is part of the memory subsystem on some Freescale QorIQ chips. It can report coherency violations (e.g. due to misusing memory that is mapped noncoherent) as well as transactions that do not hit any local access window, or which hit a local access window with an invalid target ID. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Bharat Bhushan <bharat.bhushan@freescale.com>
15 lines
380 B
Makefile
15 lines
380 B
Makefile
#
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# Makefile for memory devices
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#
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ifeq ($(CONFIG_DDR),y)
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obj-$(CONFIG_OF) += of_memory.o
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endif
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obj-$(CONFIG_TI_AEMIF) += ti-aemif.o
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obj-$(CONFIG_TI_EMIF) += emif.o
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obj-$(CONFIG_FSL_CORENET_CF) += fsl-corenet-cf.o
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obj-$(CONFIG_FSL_IFC) += fsl_ifc.o
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obj-$(CONFIG_MVEBU_DEVBUS) += mvebu-devbus.o
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obj-$(CONFIG_TEGRA20_MC) += tegra20-mc.o
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obj-$(CONFIG_TEGRA30_MC) += tegra30-mc.o
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