f401ce4810
In general Renesas hardware is not documented to the extent where the relationship between IP blocks on different SoCs can be assumed although they may appear to operate the same way. Furthermore the documentation typically does not specify a version for individual IP blocks. For these reasons a convention of using the SoC name in place of a version and providing SoC-specific compat strings has been adopted. Although not universally liked this convention is used in the bindings for a number of drivers for Renesas hardware. The purpose of this patch is to make use of the SoC-specific CMT compat string for the r7s72100 MTU2 clock source. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
408 lines
11 KiB
Plaintext
408 lines
11 KiB
Plaintext
/*
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* Device Tree Source for the r7s72100 SoC
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*
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* Copyright (C) 2013-14 Renesas Solutions Corp.
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* Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <dt-bindings/clock/r7s72100-clock.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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compatible = "renesas,r7s72100";
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interrupt-parent = <&gic>;
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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spi0 = &spi0;
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spi1 = &spi1;
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spi2 = &spi2;
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spi3 = &spi3;
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spi4 = &spi4;
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};
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clocks {
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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/* External clocks */
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extal_clk: extal_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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/* If clk present, value must be set by board */
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clock-frequency = <0>;
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clock-output-names = "extal";
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};
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usb_x1_clk: usb_x1_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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/* If clk present, value must be set by board */
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clock-frequency = <0>;
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clock-output-names = "usb_x1";
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};
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/* Special CPG clocks */
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cpg_clocks: cpg_clocks@fcfe0000 {
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#clock-cells = <1>;
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compatible = "renesas,r7s72100-cpg-clocks",
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"renesas,rz-cpg-clocks";
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reg = <0xfcfe0000 0x18>;
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clocks = <&extal_clk>, <&usb_x1_clk>;
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clock-output-names = "pll", "i", "g";
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};
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/* Fixed factor clocks */
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b_clk: b_clk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&cpg_clocks R7S72100_CLK_PLL>;
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clock-mult = <1>;
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clock-div = <3>;
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clock-output-names = "b";
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};
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p1_clk: p1_clk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&cpg_clocks R7S72100_CLK_PLL>;
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clock-mult = <1>;
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clock-div = <6>;
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clock-output-names = "p1";
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};
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p0_clk: p0_clk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&cpg_clocks R7S72100_CLK_PLL>;
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clock-mult = <1>;
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clock-div = <12>;
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clock-output-names = "p0";
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};
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/* MSTP clocks */
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mstp3_clks: mstp3_clks@fcfe0420 {
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#clock-cells = <1>;
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compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0xfcfe0420 4>;
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clocks = <&p0_clk>;
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clock-indices = <R7S72100_CLK_MTU2>;
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clock-output-names = "mtu2";
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};
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mstp4_clks: mstp4_clks@fcfe0424 {
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#clock-cells = <1>;
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compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0xfcfe0424 4>;
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clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
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<&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>;
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clock-indices = <
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R7S72100_CLK_SCIF0 R7S72100_CLK_SCIF1 R7S72100_CLK_SCIF2 R7S72100_CLK_SCIF3
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R7S72100_CLK_SCIF4 R7S72100_CLK_SCIF5 R7S72100_CLK_SCIF6 R7S72100_CLK_SCIF7
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>;
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clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
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};
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mstp9_clks: mstp9_clks@fcfe0438 {
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#clock-cells = <1>;
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compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0xfcfe0438 4>;
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clocks = <&p0_clk>, <&p0_clk>, <&p0_clk>, <&p0_clk>;
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clock-indices = <
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R7S72100_CLK_I2C0 R7S72100_CLK_I2C1 R7S72100_CLK_I2C2 R7S72100_CLK_I2C3
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>;
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clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3";
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};
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mstp10_clks: mstp10_clks@fcfe043c {
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#clock-cells = <1>;
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compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0xfcfe043c 4>;
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clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
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<&p1_clk>;
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clock-indices = <
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R7S72100_CLK_SPI0 R7S72100_CLK_SPI1 R7S72100_CLK_SPI2 R7S72100_CLK_SPI3
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R7S72100_CLK_SPI4
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>;
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clock-output-names = "spi0", "spi1", "spi2", "spi3", "spi4";
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};
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <0>;
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clock-frequency = <400000000>;
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};
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};
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gic: interrupt-controller@e8201000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0xe8201000 0x1000>,
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<0xe8202000 0x1000>;
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};
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i2c0: i2c@fcfee000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
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reg = <0xfcfee000 0x44>;
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interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>,
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<0 158 IRQ_TYPE_EDGE_RISING>,
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<0 159 IRQ_TYPE_EDGE_RISING>,
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<0 160 IRQ_TYPE_LEVEL_HIGH>,
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<0 161 IRQ_TYPE_LEVEL_HIGH>,
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<0 162 IRQ_TYPE_LEVEL_HIGH>,
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<0 163 IRQ_TYPE_LEVEL_HIGH>,
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<0 164 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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i2c1: i2c@fcfee400 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
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reg = <0xfcfee400 0x44>;
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interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>,
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<0 166 IRQ_TYPE_EDGE_RISING>,
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<0 167 IRQ_TYPE_EDGE_RISING>,
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<0 168 IRQ_TYPE_LEVEL_HIGH>,
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<0 169 IRQ_TYPE_LEVEL_HIGH>,
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<0 170 IRQ_TYPE_LEVEL_HIGH>,
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<0 171 IRQ_TYPE_LEVEL_HIGH>,
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<0 172 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R7S72100_CLK_I2C1>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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i2c2: i2c@fcfee800 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
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reg = <0xfcfee800 0x44>;
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interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>,
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<0 174 IRQ_TYPE_EDGE_RISING>,
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<0 175 IRQ_TYPE_EDGE_RISING>,
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<0 176 IRQ_TYPE_LEVEL_HIGH>,
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<0 177 IRQ_TYPE_LEVEL_HIGH>,
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<0 178 IRQ_TYPE_LEVEL_HIGH>,
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<0 179 IRQ_TYPE_LEVEL_HIGH>,
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<0 180 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R7S72100_CLK_I2C2>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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i2c3: i2c@fcfeec00 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
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reg = <0xfcfeec00 0x44>;
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interrupts = <0 181 IRQ_TYPE_LEVEL_HIGH>,
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<0 182 IRQ_TYPE_EDGE_RISING>,
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<0 183 IRQ_TYPE_EDGE_RISING>,
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<0 184 IRQ_TYPE_LEVEL_HIGH>,
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<0 185 IRQ_TYPE_LEVEL_HIGH>,
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<0 186 IRQ_TYPE_LEVEL_HIGH>,
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<0 187 IRQ_TYPE_LEVEL_HIGH>,
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<0 188 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R7S72100_CLK_I2C3>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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mtu2: timer@fcff0000 {
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compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
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reg = <0xfcff0000 0x400>;
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interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "tgi0a";
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clocks = <&mstp3_clks R7S72100_CLK_MTU2>;
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clock-names = "fck";
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status = "disabled";
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};
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scif0: serial@e8007000 {
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compatible = "renesas,scif-r7s72100", "renesas,scif";
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reg = <0xe8007000 64>;
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interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>,
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<0 191 IRQ_TYPE_LEVEL_HIGH>,
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<0 192 IRQ_TYPE_LEVEL_HIGH>,
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<0 189 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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scif1: serial@e8007800 {
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compatible = "renesas,scif-r7s72100", "renesas,scif";
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reg = <0xe8007800 64>;
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interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>,
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<0 195 IRQ_TYPE_LEVEL_HIGH>,
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<0 196 IRQ_TYPE_LEVEL_HIGH>,
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<0 193 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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scif2: serial@e8008000 {
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compatible = "renesas,scif-r7s72100", "renesas,scif";
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reg = <0xe8008000 64>;
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interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
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<0 199 IRQ_TYPE_LEVEL_HIGH>,
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<0 200 IRQ_TYPE_LEVEL_HIGH>,
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<0 197 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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scif3: serial@e8008800 {
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compatible = "renesas,scif-r7s72100", "renesas,scif";
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reg = <0xe8008800 64>;
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interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>,
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<0 203 IRQ_TYPE_LEVEL_HIGH>,
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<0 204 IRQ_TYPE_LEVEL_HIGH>,
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<0 201 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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scif4: serial@e8009000 {
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compatible = "renesas,scif-r7s72100", "renesas,scif";
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reg = <0xe8009000 64>;
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interrupts = <0 206 IRQ_TYPE_LEVEL_HIGH>,
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<0 207 IRQ_TYPE_LEVEL_HIGH>,
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<0 208 IRQ_TYPE_LEVEL_HIGH>,
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<0 205 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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scif5: serial@e8009800 {
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compatible = "renesas,scif-r7s72100", "renesas,scif";
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reg = <0xe8009800 64>;
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interrupts = <0 210 IRQ_TYPE_LEVEL_HIGH>,
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<0 211 IRQ_TYPE_LEVEL_HIGH>,
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<0 212 IRQ_TYPE_LEVEL_HIGH>,
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<0 209 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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scif6: serial@e800a000 {
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compatible = "renesas,scif-r7s72100", "renesas,scif";
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reg = <0xe800a000 64>;
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interrupts = <0 214 IRQ_TYPE_LEVEL_HIGH>,
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<0 215 IRQ_TYPE_LEVEL_HIGH>,
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<0 216 IRQ_TYPE_LEVEL_HIGH>,
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<0 213 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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scif7: serial@e800a800 {
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compatible = "renesas,scif-r7s72100", "renesas,scif";
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reg = <0xe800a800 64>;
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interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>,
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<0 219 IRQ_TYPE_LEVEL_HIGH>,
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<0 220 IRQ_TYPE_LEVEL_HIGH>,
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<0 217 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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spi0: spi@e800c800 {
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compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
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reg = <0xe800c800 0x24>;
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interrupts = <0 238 IRQ_TYPE_LEVEL_HIGH>,
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<0 239 IRQ_TYPE_LEVEL_HIGH>,
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<0 240 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error", "rx", "tx";
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clocks = <&mstp10_clks R7S72100_CLK_SPI0>;
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi1: spi@e800d000 {
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compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
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reg = <0xe800d000 0x24>;
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interrupts = <0 241 IRQ_TYPE_LEVEL_HIGH>,
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<0 242 IRQ_TYPE_LEVEL_HIGH>,
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<0 243 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error", "rx", "tx";
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clocks = <&mstp10_clks R7S72100_CLK_SPI1>;
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi2: spi@e800d800 {
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compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
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reg = <0xe800d800 0x24>;
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interrupts = <0 244 IRQ_TYPE_LEVEL_HIGH>,
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<0 245 IRQ_TYPE_LEVEL_HIGH>,
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<0 246 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error", "rx", "tx";
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clocks = <&mstp10_clks R7S72100_CLK_SPI2>;
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi3: spi@e800e000 {
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compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
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reg = <0xe800e000 0x24>;
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interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>,
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<0 248 IRQ_TYPE_LEVEL_HIGH>,
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<0 249 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error", "rx", "tx";
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clocks = <&mstp10_clks R7S72100_CLK_SPI3>;
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi4: spi@e800e800 {
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compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
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reg = <0xe800e800 0x24>;
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interrupts = <0 250 IRQ_TYPE_LEVEL_HIGH>,
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<0 251 IRQ_TYPE_LEVEL_HIGH>,
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<0 252 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error", "rx", "tx";
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clocks = <&mstp10_clks R7S72100_CLK_SPI4>;
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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