35a9ad8af0
Pull networking updates from David Miller:
"Most notable changes in here:
1) By far the biggest accomplishment, thanks to a large range of
contributors, is the addition of multi-send for transmit. This is
the result of discussions back in Chicago, and the hard work of
several individuals.
Now, when the ->ndo_start_xmit() method of a driver sees
skb->xmit_more as true, it can choose to defer the doorbell
telling the driver to start processing the new TX queue entires.
skb->xmit_more means that the generic networking is guaranteed to
call the driver immediately with another SKB to send.
There is logic added to the qdisc layer to dequeue multiple
packets at a time, and the handling mis-predicted offloads in
software is now done with no locks held.
Finally, pktgen is extended to have a "burst" parameter that can
be used to test a multi-send implementation.
Several drivers have xmit_more support: i40e, igb, ixgbe, mlx4,
virtio_net
Adding support is almost trivial, so export more drivers to
support this optimization soon.
I want to thank, in no particular or implied order, Jesper
Dangaard Brouer, Eric Dumazet, Alexander Duyck, Tom Herbert, Jamal
Hadi Salim, John Fastabend, Florian Westphal, Daniel Borkmann,
David Tat, Hannes Frederic Sowa, and Rusty Russell.
2) PTP and timestamping support in bnx2x, from Michal Kalderon.
3) Allow adjusting the rx_copybreak threshold for a driver via
ethtool, and add rx_copybreak support to enic driver. From
Govindarajulu Varadarajan.
4) Significant enhancements to the generic PHY layer and the bcm7xxx
driver in particular (EEE support, auto power down, etc.) from
Florian Fainelli.
5) Allow raw buffers to be used for flow dissection, allowing drivers
to determine the optimal "linear pull" size for devices that DMA
into pools of pages. The objective is to get exactly the
necessary amount of headers into the linear SKB area pre-pulled,
but no more. The new interface drivers use is eth_get_headlen().
From WANG Cong, with driver conversions (several had their own
by-hand duplicated implementations) by Alexander Duyck and Eric
Dumazet.
6) Support checksumming more smoothly and efficiently for
encapsulations, and add "foo over UDP" facility. From Tom
Herbert.
7) Add Broadcom SF2 switch driver to DSA layer, from Florian
Fainelli.
8) eBPF now can load programs via a system call and has an extensive
testsuite. Alexei Starovoitov and Daniel Borkmann.
9) Major overhaul of the packet scheduler to use RCU in several major
areas such as the classifiers and rate estimators. From John
Fastabend.
10) Add driver for Intel FM10000 Ethernet Switch, from Alexander
Duyck.
11) Rearrange TCP_SKB_CB() to reduce cache line misses, from Eric
Dumazet.
12) Add Datacenter TCP congestion control algorithm support, From
Florian Westphal.
13) Reorganize sk_buff so that __copy_skb_header() is significantly
faster. From Eric Dumazet"
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1558 commits)
netlabel: directly return netlbl_unlabel_genl_init()
net: add netdev_txq_bql_{enqueue, complete}_prefetchw() helpers
net: description of dma_cookie cause make xmldocs warning
cxgb4: clean up a type issue
cxgb4: potential shift wrapping bug
i40e: skb->xmit_more support
net: fs_enet: Add NAPI TX
net: fs_enet: Remove non NAPI RX
r8169:add support for RTL8168EP
net_sched: copy exts->type in tcf_exts_change()
wimax: convert printk to pr_foo()
af_unix: remove 0 assignment on static
ipv6: Do not warn for informational ICMP messages, regardless of type.
Update Intel Ethernet Driver maintainers list
bridge: Save frag_max_size between PRE_ROUTING and POST_ROUTING
tipc: fix bug in multicast congestion handling
net: better IFF_XMIT_DST_RELEASE support
net/mlx4_en: remove NETDEV_TX_BUSY
3c59x: fix bad split of cpu_to_le32(pci_map_single())
net: bcmgenet: fix Tx ring priority programming
...
384 lines
8.7 KiB
Plaintext
384 lines
8.7 KiB
Plaintext
/*
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* Copyright (c) 2013 MundoReader S.L.
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* Author: Heiko Stuebner <heiko@sntech.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "skeleton.dtsi"
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/ {
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interrupt-parent = <&gic>;
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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i2c4 = &i2c4;
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mshc0 = &emmc;
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mshc1 = &mmc0;
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mshc2 = &mmc1;
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spi0 = &spi0;
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spi1 = &spi1;
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};
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amba {
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compatible = "arm,amba-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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dmac1_s: dma-controller@20018000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x20018000 0x4000>;
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
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#dma-cells = <1>;
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clocks = <&cru ACLK_DMA1>;
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clock-names = "apb_pclk";
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};
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dmac1_ns: dma-controller@2001c000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x2001c000 0x4000>;
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
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#dma-cells = <1>;
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clocks = <&cru ACLK_DMA1>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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dmac2: dma-controller@20078000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x20078000 0x4000>;
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interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
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#dma-cells = <1>;
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clocks = <&cru ACLK_DMA2>;
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clock-names = "apb_pclk";
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};
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};
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xin24m: oscillator {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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#clock-cells = <0>;
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clock-output-names = "xin24m";
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};
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L2: l2-cache-controller@10138000 {
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compatible = "arm,pl310-cache";
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reg = <0x10138000 0x1000>;
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cache-unified;
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cache-level = <2>;
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};
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scu@1013c000 {
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compatible = "arm,cortex-a9-scu";
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reg = <0x1013c000 0x100>;
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};
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global_timer: global-timer@1013c200 {
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compatible = "arm,cortex-a9-global-timer";
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reg = <0x1013c200 0x20>;
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interrupts = <GIC_PPI 11 0x304>;
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clocks = <&cru CORE_PERI>;
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};
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local_timer: local-timer@1013c600 {
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compatible = "arm,cortex-a9-twd-timer";
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reg = <0x1013c600 0x20>;
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interrupts = <GIC_PPI 13 0x304>;
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clocks = <&cru CORE_PERI>;
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};
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gic: interrupt-controller@1013d000 {
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compatible = "arm,cortex-a9-gic";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = <0x1013d000 0x1000>,
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<0x1013c100 0x0100>;
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};
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uart0: serial@10124000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x10124000 0x400>;
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <1>;
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clock-names = "baudclk", "apb_pclk";
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clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
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status = "disabled";
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};
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uart1: serial@10126000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x10126000 0x400>;
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interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <1>;
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clock-names = "baudclk", "apb_pclk";
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clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
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status = "disabled";
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};
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usb_otg: usb@10180000 {
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compatible = "rockchip,rk3066-usb", "snps,dwc2";
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reg = <0x10180000 0x40000>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru HCLK_OTG0>;
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clock-names = "otg";
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status = "disabled";
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};
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usb_host: usb@101c0000 {
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compatible = "snps,dwc2";
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reg = <0x101c0000 0x40000>;
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interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru HCLK_OTG1>;
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clock-names = "otg";
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status = "disabled";
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};
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emac: ethernet@10204000 {
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compatible = "snps,arc-emac";
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reg = <0x10204000 0x3c>;
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interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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rockchip,grf = <&grf>;
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clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
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clock-names = "hclk", "macref";
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max-speed = <100>;
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phy-mode = "rmii";
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status = "disabled";
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};
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mmc0: dwmmc@10214000 {
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compatible = "rockchip,rk2928-dw-mshc";
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reg = <0x10214000 0x1000>;
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interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
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clock-names = "biu", "ciu";
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status = "disabled";
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};
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mmc1: dwmmc@10218000 {
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compatible = "rockchip,rk2928-dw-mshc";
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reg = <0x10218000 0x1000>;
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interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>;
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clock-names = "biu", "ciu";
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status = "disabled";
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};
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emmc: dwmmc@1021c000 {
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compatible = "rockchip,rk2928-dw-mshc";
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reg = <0x1021c000 0x1000>;
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interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
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clock-names = "biu", "ciu";
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status = "disabled";
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};
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pmu: pmu@20004000 {
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compatible = "rockchip,rk3066-pmu", "syscon";
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reg = <0x20004000 0x100>;
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};
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grf: grf@20008000 {
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compatible = "syscon";
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reg = <0x20008000 0x200>;
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};
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i2c0: i2c@2002d000 {
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compatible = "rockchip,rk3066-i2c";
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reg = <0x2002d000 0x1000>;
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interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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rockchip,grf = <&grf>;
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clock-names = "i2c";
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clocks = <&cru PCLK_I2C0>;
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status = "disabled";
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};
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i2c1: i2c@2002f000 {
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compatible = "rockchip,rk3066-i2c";
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reg = <0x2002f000 0x1000>;
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interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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rockchip,grf = <&grf>;
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clocks = <&cru PCLK_I2C1>;
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clock-names = "i2c";
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status = "disabled";
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};
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pwm0: pwm@20030000 {
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compatible = "rockchip,rk2928-pwm";
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reg = <0x20030000 0x10>;
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#pwm-cells = <2>;
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clocks = <&cru PCLK_PWM01>;
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status = "disabled";
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};
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pwm1: pwm@20030010 {
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compatible = "rockchip,rk2928-pwm";
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reg = <0x20030010 0x10>;
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#pwm-cells = <2>;
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clocks = <&cru PCLK_PWM01>;
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status = "disabled";
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};
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wdt: watchdog@2004c000 {
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compatible = "snps,dw-wdt";
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reg = <0x2004c000 0x100>;
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clocks = <&cru PCLK_WDT>;
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interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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pwm2: pwm@20050020 {
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compatible = "rockchip,rk2928-pwm";
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reg = <0x20050020 0x10>;
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#pwm-cells = <2>;
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clocks = <&cru PCLK_PWM23>;
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status = "disabled";
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};
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pwm3: pwm@20050030 {
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compatible = "rockchip,rk2928-pwm";
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reg = <0x20050030 0x10>;
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#pwm-cells = <2>;
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clocks = <&cru PCLK_PWM23>;
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status = "disabled";
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};
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i2c2: i2c@20056000 {
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compatible = "rockchip,rk3066-i2c";
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reg = <0x20056000 0x1000>;
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interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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rockchip,grf = <&grf>;
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clocks = <&cru PCLK_I2C2>;
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clock-names = "i2c";
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status = "disabled";
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};
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i2c3: i2c@2005a000 {
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compatible = "rockchip,rk3066-i2c";
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reg = <0x2005a000 0x1000>;
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interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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rockchip,grf = <&grf>;
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clocks = <&cru PCLK_I2C3>;
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clock-names = "i2c";
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status = "disabled";
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};
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i2c4: i2c@2005e000 {
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compatible = "rockchip,rk3066-i2c";
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reg = <0x2005e000 0x1000>;
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interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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rockchip,grf = <&grf>;
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clocks = <&cru PCLK_I2C4>;
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clock-names = "i2c";
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status = "disabled";
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};
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uart2: serial@20064000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x20064000 0x400>;
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interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <1>;
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clock-names = "baudclk", "apb_pclk";
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clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
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status = "disabled";
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};
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uart3: serial@20068000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x20068000 0x400>;
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <1>;
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clock-names = "baudclk", "apb_pclk";
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clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
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status = "disabled";
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};
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saradc: saradc@2006c000 {
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compatible = "rockchip,saradc";
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reg = <0x2006c000 0x100>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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#io-channel-cells = <1>;
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clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
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clock-names = "saradc", "apb_pclk";
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status = "disabled";
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};
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spi0: spi@20070000 {
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compatible = "rockchip,rk3066-spi";
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clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
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clock-names = "spiclk", "apb_pclk";
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interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x20070000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi1: spi@20074000 {
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compatible = "rockchip,rk3066-spi";
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clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
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clock-names = "spiclk", "apb_pclk";
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interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x20074000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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