![Naveen N. Rao](/assets/img/avatar_default.png)
On some architectures (powerpc in particular), the number of registers
exceeds what can be represented in an integer bitmask. Ensure we
generate the proper bitmask on such platforms.
Fixes: 71ad0f5e4
("perf tools: Support for DWARF CFI unwinding on post processing")
Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Acked-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
34 lines
570 B
C
34 lines
570 B
C
#include <errno.h>
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#include "perf_regs.h"
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#include "event.h"
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const struct sample_reg __weak sample_reg_masks[] = {
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SMPL_REG_END
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};
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#ifdef HAVE_PERF_REGS_SUPPORT
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int perf_reg_value(u64 *valp, struct regs_dump *regs, int id)
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{
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int i, idx = 0;
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u64 mask = regs->mask;
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if (regs->cache_mask & (1ULL << id))
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goto out;
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if (!(mask & (1ULL << id)))
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return -EINVAL;
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for (i = 0; i < id; i++) {
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if (mask & (1ULL << i))
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idx++;
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}
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regs->cache_mask |= (1ULL << id);
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regs->cache_regs[id] = regs->regs[idx];
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out:
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*valp = regs->cache_regs[id];
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return 0;
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}
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#endif
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