5b4500d194
RT2880 has a different location for the early serial port. Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/5170/
49 lines
1.2 KiB
C
49 lines
1.2 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
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*/
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#include <linux/io.h>
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#include <linux/serial_reg.h>
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#include <asm/addrspace.h>
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#ifdef CONFIG_SOC_RT288X
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#define EARLY_UART_BASE 0x300c00
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#else
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#define EARLY_UART_BASE 0x10000c00
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#endif
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#define UART_REG_RX 0x00
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#define UART_REG_TX 0x04
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#define UART_REG_IER 0x08
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#define UART_REG_IIR 0x0c
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#define UART_REG_FCR 0x10
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#define UART_REG_LCR 0x14
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#define UART_REG_MCR 0x18
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#define UART_REG_LSR 0x1c
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static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE);
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static inline void uart_w32(u32 val, unsigned reg)
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{
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__raw_writel(val, uart_membase + reg);
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}
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static inline u32 uart_r32(unsigned reg)
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{
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return __raw_readl(uart_membase + reg);
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}
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void prom_putchar(unsigned char ch)
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{
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while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0)
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;
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uart_w32(ch, UART_REG_TX);
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while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0)
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;
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}
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