alistair23-linux/include/linux/mtd
Chuanhong Guo f1541773af mtd: spinand: rework detect procedure for different READ_ID operation
Currently there are 3 different variants of read_id implementation:
1. opcode only. Found in GD5FxGQ4xF.
2. opcode + 1 addr byte. Found in GD5GxGQ4xA/E
3. opcode + 1 dummy byte. Found in other currently supported chips.

Original implementation was for variant 1 and let detect function
of chips with variant 2 and 3 to ignore the first byte. This isn't
robust:

1. For chips of variant 2, if SPI master doesn't keep MOSI low
during read, chip will get a random id offset, and the entire id
buffer will shift by that offset, causing detect failure.

2. For chips of variant 1, if it happens to get a devid that equals
to manufacture id of variant 2 or 3 chips, it'll get incorrectly
detected.

This patch reworks detect procedure to address problems above. New
logic do detection for all variants separatedly, in 1-2-3 order.
Since all current detect methods do exactly the same id matching
procedure, unify them into core.c and remove detect method from
manufacture_ops.

Tested on GD5F1GQ4UAYIG and W25N01GVZEIG.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200208074439.146296-1-gch981213@gmail.com
2020-03-09 14:50:19 +01:00
..
bbm.h
blktrans.h
cfi.h
cfi_endian.h
concat.h
doc2000.h
flashchip.h
ftl.h
gen_probe.h
hyperbus.h
inftl.h
jedec.h
latch-addr-flash.h
lpc32xx_mlc.h
lpc32xx_slc.h
map.h
mtd.h
mtdram.h
nand-gpio.h
nand.h
nand_bch.h
nand_ecc.h
ndfc.h
nftl.h
onenand.h
onenand_regs.h
onfi.h
partitions.h
pfow.h
physmap.h
pismo.h
plat-ram.h
platnand.h
qinfo.h
rawnand.h
sh_flctl.h
sharpsl.h
spear_smi.h
spi-nor.h
spinand.h mtd: spinand: rework detect procedure for different READ_ID operation 2020-03-09 14:50:19 +01:00
super.h
ubi.h
xip.h