Catalin Marinas f1a0c4aa09 arm64: Cache maintenance routines ... The patch adds functionality required for cache maintenance. The AArch64 architecture mandates non-aliasing VIPT or PIPT D-cache and VIPT (may have aliases) or ASID-tagged VIVT I-cache. Cache maintenance operations are automatically broadcast in hardware between CPUs. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de>		2012-09-17 13:42:00 +01:00
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cache.S	arm64: Cache maintenance routines	2012-09-17 13:42:00 +01:00
context.c	arm64: Process management	2012-09-17 13:41:58 +01:00
copypage.c	arm64: MMU fault handling and page table management	2012-09-17 13:41:57 +01:00
extable.c	arm64: MMU fault handling and page table management	2012-09-17 13:41:57 +01:00
fault.c	arm64: MMU fault handling and page table management	2012-09-17 13:41:57 +01:00
flush.c	arm64: Cache maintenance routines	2012-09-17 13:42:00 +01:00
init.c
mm.h	arm64: MMU fault handling and page table management	2012-09-17 13:41:57 +01:00
mmap.c	arm64: MMU fault handling and page table management	2012-09-17 13:41:57 +01:00
mmu.c
pgd.c	arm64: MMU fault handling and page table management	2012-09-17 13:41:57 +01:00
proc-macros.S
proc.S	arm64: CPU support	2012-09-17 13:41:59 +01:00