![Linus Torvalds](/assets/img/avatar_default.png)
Primarily device driver additions, features and bug fixes. Not much touching gpio common subsystem support. Should not be scary. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQx2nHAAoJEEFnBt12D9kBKnIP/0y/0LMUUMVp1LN/UeCyPdq+ rqWdI57a+ToAiGcdSG2INR5fjC8duPP1UOSgQXQFsAdF1qy7vN7ejPqmoAGcVoRW P9O64s8eYQprabx3fSiqAOhav6ZUpxyfri9z/sz8JaTlpJrbiqf1MrxFQ/0oXZa9 KqOFAJvKn+iqWjcpFkmeIvNsFT2lTeURyXhvYWUFig/VVuS335+FZYX0Ic1C69YM tf0Z+a6XO8JnAKgC13GsyJ6ctXA1kg1oKLnLHEekr3Qhkic3MTFKS2dPExzGjnbi NY4ev2SxAq74CFwSJDuhPiPk20FpveHKHLsptFdNpCR9lMG038oRnqAnYyw3gV/w z4GufpIZGK/xemIgHqNHejxS+tcH4Ax1wU++TkmIvsPJDq7uZPX/Gu9/+BMpeKxJ oJJV+mRCKDcjxXcxtrybF9+t8WdVZfW2qSt1K7LRO3eRV2n9Y+20R6iGKXhYxHaj TaQTtXIbc4q5ANg72O+c8htBhy0a2H1O5CtrXwwxBBHHsRachyHT6V9AD+7AKZ6e YElRV+v8dOviuUcj+nbf2riA7KnwtBLYfwdVQzTfbD1Fq8RUvMEjq2XQXYKhrMSw r8gp1sUnFmAVOikJFqVgYN8NyToVEyw1i2LH8skzCUnE0PPi+kT8CtaY+tTMuF3v mBixcMEKKhzsFtYmAqU+ =2XeO -----END PGP SIGNATURE----- Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux-2.6 Pull GPIO updates from Grant Likely: "GPIO follow up patch and type change for v3.5 merge window Primarily device driver additions, features and bug fixes. Not much touching gpio common subsystem support. Should not be scary." * tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux-2.6: (34 commits) gpio: Provide the STMPE GPIO driver with its own IRQ Domain gpio: add TS-5500 DIO blocks support gpio: pcf857x: use client->irq for gpio_to_irq() gpio: stmpe: Add DT support for stmpe gpio gpio: pl061 depends on ARM gpio/pl061: remove old comment gpio: SPEAr: add spi chipselect control driver gpio: gpio-max710x: Support device tree probing gpio: twl4030: Use only TWL4030_MODULE_LED for LED configuration gpio: tegra: read output value when gpio is set in direction_out gpio: pca953x: Add compatible strings to gpio-pca953x driver gpio: pca953x: Register an IRQ domain gpio: mvebu: Set free callback for gpio_chip gpio: tegra: Drop exporting static functions gpio: tegra: Staticize non-exported symbols gpio: tegra: fix suspend/resume apis gpio-pch: Set parent dev for gpio chip gpio: em: Fix build errors GPIO: clps711x: use platform_device_unregister in gpio_clps711x_init() gpio/tc3589x: convert to use the simple irqdomain ...
311 lines
9.6 KiB
C
311 lines
9.6 KiB
C
#ifndef _ASM_GENERIC_GPIO_H
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#define _ASM_GENERIC_GPIO_H
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/of.h>
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#include <linux/pinctrl/pinctrl.h>
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#ifdef CONFIG_GPIOLIB
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#include <linux/compiler.h>
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/* Platforms may implement their GPIO interface with library code,
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* at a small performance cost for non-inlined operations and some
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* extra memory (for code and for per-GPIO table entries).
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*
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* While the GPIO programming interface defines valid GPIO numbers
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* to be in the range 0..MAX_INT, this library restricts them to the
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* smaller range 0..ARCH_NR_GPIOS-1.
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*
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* ARCH_NR_GPIOS is somewhat arbitrary; it usually reflects the sum of
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* builtin/SoC GPIOs plus a number of GPIOs on expanders; the latter is
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* actually an estimate of a board-specific value.
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*/
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#ifndef ARCH_NR_GPIOS
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#define ARCH_NR_GPIOS 256
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#endif
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/*
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* "valid" GPIO numbers are nonnegative and may be passed to
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* setup routines like gpio_request(). only some valid numbers
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* can successfully be requested and used.
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*
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* Invalid GPIO numbers are useful for indicating no-such-GPIO in
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* platform data and other tables.
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*/
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static inline bool gpio_is_valid(int number)
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{
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return number >= 0 && number < ARCH_NR_GPIOS;
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}
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struct device;
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struct gpio;
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struct seq_file;
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struct module;
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struct device_node;
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/**
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* struct gpio_chip - abstract a GPIO controller
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* @label: for diagnostics
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* @dev: optional device providing the GPIOs
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* @owner: helps prevent removal of modules exporting active GPIOs
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* @request: optional hook for chip-specific activation, such as
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* enabling module power and clock; may sleep
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* @free: optional hook for chip-specific deactivation, such as
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* disabling module power and clock; may sleep
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* @get_direction: returns direction for signal "offset", 0=out, 1=in,
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* (same as GPIOF_DIR_XXX), or negative error
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* @direction_input: configures signal "offset" as input, or returns error
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* @get: returns value for signal "offset"; for output signals this
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* returns either the value actually sensed, or zero
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* @direction_output: configures signal "offset" as output, or returns error
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* @set_debounce: optional hook for setting debounce time for specified gpio in
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* interrupt triggered gpio chips
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* @set: assigns output value for signal "offset"
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* @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
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* implementation may not sleep
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* @dbg_show: optional routine to show contents in debugfs; default code
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* will be used when this is omitted, but custom code can show extra
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* state (such as pullup/pulldown configuration).
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* @base: identifies the first GPIO number handled by this chip; or, if
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* negative during registration, requests dynamic ID allocation.
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* @ngpio: the number of GPIOs handled by this controller; the last GPIO
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* handled is (base + ngpio - 1).
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* @can_sleep: flag must be set iff get()/set() methods sleep, as they
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* must while accessing GPIO expander chips over I2C or SPI
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* @names: if set, must be an array of strings to use as alternative
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* names for the GPIOs in this chip. Any entry in the array
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* may be NULL if there is no alias for the GPIO, however the
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* array must be @ngpio entries long. A name can include a single printk
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* format specifier for an unsigned int. It is substituted by the actual
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* number of the gpio.
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*
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* A gpio_chip can help platforms abstract various sources of GPIOs so
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* they can all be accessed through a common programing interface.
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* Example sources would be SOC controllers, FPGAs, multifunction
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* chips, dedicated GPIO expanders, and so on.
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*
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* Each chip controls a number of signals, identified in method calls
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* by "offset" values in the range 0..(@ngpio - 1). When those signals
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* are referenced through calls like gpio_get_value(gpio), the offset
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* is calculated by subtracting @base from the gpio number.
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*/
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struct gpio_chip {
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const char *label;
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struct device *dev;
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struct module *owner;
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int (*request)(struct gpio_chip *chip,
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unsigned offset);
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void (*free)(struct gpio_chip *chip,
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unsigned offset);
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int (*get_direction)(struct gpio_chip *chip,
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unsigned offset);
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int (*direction_input)(struct gpio_chip *chip,
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unsigned offset);
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int (*get)(struct gpio_chip *chip,
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unsigned offset);
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int (*direction_output)(struct gpio_chip *chip,
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unsigned offset, int value);
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int (*set_debounce)(struct gpio_chip *chip,
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unsigned offset, unsigned debounce);
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void (*set)(struct gpio_chip *chip,
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unsigned offset, int value);
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int (*to_irq)(struct gpio_chip *chip,
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unsigned offset);
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void (*dbg_show)(struct seq_file *s,
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struct gpio_chip *chip);
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int base;
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u16 ngpio;
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const char *const *names;
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unsigned can_sleep:1;
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unsigned exported:1;
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#if defined(CONFIG_OF_GPIO)
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/*
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* If CONFIG_OF is enabled, then all GPIO controllers described in the
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* device tree automatically may have an OF translation
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*/
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struct device_node *of_node;
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int of_gpio_n_cells;
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int (*of_xlate)(struct gpio_chip *gc,
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const struct of_phandle_args *gpiospec, u32 *flags);
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#endif
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#ifdef CONFIG_PINCTRL
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/*
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* If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
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* describe the actual pin range which they serve in an SoC. This
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* information would be used by pinctrl subsystem to configure
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* corresponding pins for gpio usage.
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*/
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struct list_head pin_ranges;
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#endif
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};
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extern const char *gpiochip_is_requested(struct gpio_chip *chip,
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unsigned offset);
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extern struct gpio_chip *gpio_to_chip(unsigned gpio);
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extern int __must_check gpiochip_reserve(int start, int ngpio);
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/* add/remove chips */
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extern int gpiochip_add(struct gpio_chip *chip);
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extern int __must_check gpiochip_remove(struct gpio_chip *chip);
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extern struct gpio_chip *gpiochip_find(void *data,
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int (*match)(struct gpio_chip *chip,
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void *data));
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/* Always use the library code for GPIO management calls,
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* or when sleeping may be involved.
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*/
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extern int gpio_request(unsigned gpio, const char *label);
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extern void gpio_free(unsigned gpio);
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extern int gpio_direction_input(unsigned gpio);
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extern int gpio_direction_output(unsigned gpio, int value);
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extern int gpio_set_debounce(unsigned gpio, unsigned debounce);
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extern int gpio_get_value_cansleep(unsigned gpio);
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extern void gpio_set_value_cansleep(unsigned gpio, int value);
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/* A platform's <asm/gpio.h> code may want to inline the I/O calls when
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* the GPIO is constant and refers to some always-present controller,
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* giving direct access to chip registers and tight bitbanging loops.
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*/
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extern int __gpio_get_value(unsigned gpio);
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extern void __gpio_set_value(unsigned gpio, int value);
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extern int __gpio_cansleep(unsigned gpio);
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extern int __gpio_to_irq(unsigned gpio);
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extern int gpio_request_one(unsigned gpio, unsigned long flags, const char *label);
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extern int gpio_request_array(const struct gpio *array, size_t num);
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extern void gpio_free_array(const struct gpio *array, size_t num);
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/* bindings for managed devices that want to request gpios */
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int devm_gpio_request(struct device *dev, unsigned gpio, const char *label);
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int devm_gpio_request_one(struct device *dev, unsigned gpio,
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unsigned long flags, const char *label);
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void devm_gpio_free(struct device *dev, unsigned int gpio);
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#ifdef CONFIG_GPIO_SYSFS
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/*
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* A sysfs interface can be exported by individual drivers if they want,
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* but more typically is configured entirely from userspace.
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*/
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extern int gpio_export(unsigned gpio, bool direction_may_change);
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extern int gpio_export_link(struct device *dev, const char *name,
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unsigned gpio);
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extern int gpio_sysfs_set_active_low(unsigned gpio, int value);
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extern void gpio_unexport(unsigned gpio);
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#endif /* CONFIG_GPIO_SYSFS */
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#else /* !CONFIG_GPIOLIB */
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static inline bool gpio_is_valid(int number)
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{
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/* only non-negative numbers are valid */
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return number >= 0;
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}
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/* platforms that don't directly support access to GPIOs through I2C, SPI,
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* or other blocking infrastructure can use these wrappers.
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*/
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static inline int gpio_cansleep(unsigned gpio)
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{
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return 0;
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}
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static inline int gpio_get_value_cansleep(unsigned gpio)
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{
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might_sleep();
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return __gpio_get_value(gpio);
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}
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static inline void gpio_set_value_cansleep(unsigned gpio, int value)
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{
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might_sleep();
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__gpio_set_value(gpio, value);
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}
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#endif /* !CONFIG_GPIOLIB */
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#ifndef CONFIG_GPIO_SYSFS
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struct device;
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/* sysfs support is only available with gpiolib, where it's optional */
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static inline int gpio_export(unsigned gpio, bool direction_may_change)
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{
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return -ENOSYS;
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}
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static inline int gpio_export_link(struct device *dev, const char *name,
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unsigned gpio)
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{
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return -ENOSYS;
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}
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static inline int gpio_sysfs_set_active_low(unsigned gpio, int value)
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{
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return -ENOSYS;
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}
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static inline void gpio_unexport(unsigned gpio)
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{
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}
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#endif /* CONFIG_GPIO_SYSFS */
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#ifdef CONFIG_PINCTRL
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/**
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* struct gpio_pin_range - pin range controlled by a gpio chip
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* @head: list for maintaining set of pin ranges, used internally
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* @pctldev: pinctrl device which handles corresponding pins
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* @range: actual range of pins controlled by a gpio controller
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*/
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struct gpio_pin_range {
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struct list_head node;
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struct pinctrl_dev *pctldev;
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struct pinctrl_gpio_range range;
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};
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int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
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unsigned int gpio_offset, unsigned int pin_offset,
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unsigned int npins);
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void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
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#else
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static inline int
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gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
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unsigned int gpio_offset, unsigned int pin_offset,
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unsigned int npins)
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{
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return 0;
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}
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static inline void
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gpiochip_remove_pin_ranges(struct gpio_chip *chip)
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{
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}
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#endif /* CONFIG_PINCTRL */
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#endif /* _ASM_GENERIC_GPIO_H */
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