![Tobias Klauser](/assets/img/avatar_default.png)
Add an UART driver for the UART component available as a SOPC (System on Programmable Chip) component for Altera FPGAs. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
571 lines
15 KiB
C
571 lines
15 KiB
C
/*
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* altera_uart.c -- Altera UART driver
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*
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* Based on mcf.c -- Freescale ColdFire UART driver
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*
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* (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
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* (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
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* (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/console.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial.h>
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#include <linux/serial_core.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/altera_uart.h>
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#define DRV_NAME "altera_uart"
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/*
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* Altera UART register definitions according to the Nios UART datasheet:
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* http://www.altera.com/literature/ds/ds_nios_uart.pdf
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*/
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#define ALTERA_UART_SIZE 32
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#define ALTERA_UART_RXDATA_REG 0
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#define ALTERA_UART_TXDATA_REG 4
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#define ALTERA_UART_STATUS_REG 8
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#define ALTERA_UART_CONTROL_REG 12
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#define ALTERA_UART_DIVISOR_REG 16
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#define ALTERA_UART_EOP_REG 20
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#define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */
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#define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */
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#define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */
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#define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */
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#define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */
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#define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */
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#define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */
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#define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */
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#define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */
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#define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */
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#define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */
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#define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */
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/* Enable interrupt on... */
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#define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */
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#define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */
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#define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */
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#define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */
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#define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */
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#define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */
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#define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */
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#define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */
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#define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/
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#define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */
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#define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */
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#define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */
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#define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */
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/*
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* Local per-uart structure.
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*/
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struct altera_uart {
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struct uart_port port;
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unsigned int sigs; /* Local copy of line sigs */
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unsigned short imr; /* Local IMR mirror */
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};
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static unsigned int altera_uart_tx_empty(struct uart_port *port)
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{
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return (readl(port->membase + ALTERA_UART_STATUS_REG) &
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ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
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}
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static unsigned int altera_uart_get_mctrl(struct uart_port *port)
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{
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struct altera_uart *pp = container_of(port, struct altera_uart, port);
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unsigned long flags;
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unsigned int sigs;
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spin_lock_irqsave(&port->lock, flags);
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sigs =
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(readl(port->membase + ALTERA_UART_STATUS_REG) &
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ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
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sigs |= (pp->sigs & TIOCM_RTS);
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spin_unlock_irqrestore(&port->lock, flags);
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return sigs;
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}
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static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
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{
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struct altera_uart *pp = container_of(port, struct altera_uart, port);
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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pp->sigs = sigs;
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if (sigs & TIOCM_RTS)
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pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
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else
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pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
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writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static void altera_uart_start_tx(struct uart_port *port)
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{
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struct altera_uart *pp = container_of(port, struct altera_uart, port);
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
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writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static void altera_uart_stop_tx(struct uart_port *port)
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{
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struct altera_uart *pp = container_of(port, struct altera_uart, port);
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
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writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static void altera_uart_stop_rx(struct uart_port *port)
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{
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struct altera_uart *pp = container_of(port, struct altera_uart, port);
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
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writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static void altera_uart_break_ctl(struct uart_port *port, int break_state)
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{
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struct altera_uart *pp = container_of(port, struct altera_uart, port);
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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if (break_state == -1)
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pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
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else
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pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
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writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static void altera_uart_enable_ms(struct uart_port *port)
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{
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}
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static void altera_uart_set_termios(struct uart_port *port,
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struct ktermios *termios,
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struct ktermios *old)
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{
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unsigned long flags;
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unsigned int baud, baudclk;
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baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
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baudclk = port->uartclk / baud;
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if (old)
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tty_termios_copy_hw(termios, old);
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tty_termios_encode_baud_rate(termios, baud, baud);
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spin_lock_irqsave(&port->lock, flags);
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writel(baudclk, port->membase + ALTERA_UART_DIVISOR_REG);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static void altera_uart_rx_chars(struct altera_uart *pp)
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{
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struct uart_port *port = &pp->port;
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unsigned char ch, flag;
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unsigned short status;
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while ((status = readl(port->membase + ALTERA_UART_STATUS_REG)) &
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ALTERA_UART_STATUS_RRDY_MSK) {
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ch = readl(port->membase + ALTERA_UART_RXDATA_REG);
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flag = TTY_NORMAL;
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port->icount.rx++;
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if (status & ALTERA_UART_STATUS_E_MSK) {
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writel(status, port->membase + ALTERA_UART_STATUS_REG);
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if (status & ALTERA_UART_STATUS_BRK_MSK) {
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port->icount.brk++;
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if (uart_handle_break(port))
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continue;
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} else if (status & ALTERA_UART_STATUS_PE_MSK) {
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port->icount.parity++;
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} else if (status & ALTERA_UART_STATUS_ROE_MSK) {
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port->icount.overrun++;
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} else if (status & ALTERA_UART_STATUS_FE_MSK) {
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port->icount.frame++;
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}
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status &= port->read_status_mask;
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if (status & ALTERA_UART_STATUS_BRK_MSK)
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flag = TTY_BREAK;
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else if (status & ALTERA_UART_STATUS_PE_MSK)
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flag = TTY_PARITY;
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else if (status & ALTERA_UART_STATUS_FE_MSK)
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flag = TTY_FRAME;
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}
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if (uart_handle_sysrq_char(port, ch))
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continue;
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uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
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flag);
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}
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tty_flip_buffer_push(port->state->port.tty);
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}
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static void altera_uart_tx_chars(struct altera_uart *pp)
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{
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struct uart_port *port = &pp->port;
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struct circ_buf *xmit = &port->state->xmit;
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if (port->x_char) {
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/* Send special char - probably flow control */
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writel(port->x_char, port->membase + ALTERA_UART_TXDATA_REG);
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port->x_char = 0;
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port->icount.tx++;
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return;
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}
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while (readl(port->membase + ALTERA_UART_STATUS_REG) &
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ALTERA_UART_STATUS_TRDY_MSK) {
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if (xmit->head == xmit->tail)
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break;
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writel(xmit->buf[xmit->tail],
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port->membase + ALTERA_UART_TXDATA_REG);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (xmit->head == xmit->tail) {
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pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
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writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
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}
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}
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static irqreturn_t altera_uart_interrupt(int irq, void *data)
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{
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struct uart_port *port = data;
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struct altera_uart *pp = container_of(port, struct altera_uart, port);
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unsigned int isr;
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isr = readl(port->membase + ALTERA_UART_STATUS_REG) & pp->imr;
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if (isr & ALTERA_UART_STATUS_RRDY_MSK)
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altera_uart_rx_chars(pp);
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if (isr & ALTERA_UART_STATUS_TRDY_MSK)
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altera_uart_tx_chars(pp);
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return IRQ_RETVAL(isr);
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}
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static void altera_uart_config_port(struct uart_port *port, int flags)
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{
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port->type = PORT_ALTERA_UART;
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/* Clear mask, so no surprise interrupts. */
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writel(0, port->membase + ALTERA_UART_CONTROL_REG);
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/* Clear status register */
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writel(0, port->membase + ALTERA_UART_STATUS_REG);
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}
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static int altera_uart_startup(struct uart_port *port)
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{
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struct altera_uart *pp = container_of(port, struct altera_uart, port);
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unsigned long flags;
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int ret;
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ret = request_irq(port->irq, altera_uart_interrupt, IRQF_DISABLED,
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DRV_NAME, port);
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if (ret) {
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pr_err(DRV_NAME ": unable to attach Altera UART %d "
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"interrupt vector=%d\n", port->line, port->irq);
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return ret;
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}
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spin_lock_irqsave(&port->lock, flags);
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/* Enable RX interrupts now */
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pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
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writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
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spin_unlock_irqrestore(&port->lock, flags);
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return 0;
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}
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static void altera_uart_shutdown(struct uart_port *port)
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{
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struct altera_uart *pp = container_of(port, struct altera_uart, port);
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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/* Disable all interrupts now */
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pp->imr = 0;
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writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
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spin_unlock_irqrestore(&port->lock, flags);
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free_irq(port->irq, port);
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}
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static const char *altera_uart_type(struct uart_port *port)
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{
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return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
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}
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static int altera_uart_request_port(struct uart_port *port)
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{
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/* UARTs always present */
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return 0;
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}
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static void altera_uart_release_port(struct uart_port *port)
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{
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/* Nothing to release... */
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}
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static int altera_uart_verify_port(struct uart_port *port,
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struct serial_struct *ser)
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{
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if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
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return -EINVAL;
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return 0;
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}
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/*
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* Define the basic serial functions we support.
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*/
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static struct uart_ops altera_uart_ops = {
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.tx_empty = altera_uart_tx_empty,
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.get_mctrl = altera_uart_get_mctrl,
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.set_mctrl = altera_uart_set_mctrl,
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.start_tx = altera_uart_start_tx,
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.stop_tx = altera_uart_stop_tx,
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.stop_rx = altera_uart_stop_rx,
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.enable_ms = altera_uart_enable_ms,
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.break_ctl = altera_uart_break_ctl,
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.startup = altera_uart_startup,
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.shutdown = altera_uart_shutdown,
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.set_termios = altera_uart_set_termios,
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.type = altera_uart_type,
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.request_port = altera_uart_request_port,
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.release_port = altera_uart_release_port,
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.config_port = altera_uart_config_port,
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.verify_port = altera_uart_verify_port,
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};
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static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
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#if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
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int __init early_altera_uart_setup(struct altera_uart_platform_uart *platp)
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{
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struct uart_port *port;
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int i;
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for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS && platp[i].mapbase; i++) {
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port = &altera_uart_ports[i].port;
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port->line = i;
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port->type = PORT_ALTERA_UART;
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port->mapbase = platp[i].mapbase;
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port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
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port->iotype = SERIAL_IO_MEM;
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port->irq = platp[i].irq;
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port->uartclk = platp[i].uartclk;
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port->flags = ASYNC_BOOT_AUTOCONF;
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port->ops = &altera_uart_ops;
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}
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return 0;
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}
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static void altera_uart_console_putc(struct console *co, const char c)
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{
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struct uart_port *port = &(altera_uart_ports + co->index)->port;
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int i;
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for (i = 0; i < 0x10000; i++) {
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if (readl(port->membase + ALTERA_UART_STATUS_REG) &
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ALTERA_UART_STATUS_TRDY_MSK)
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break;
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}
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writel(c, port->membase + ALTERA_UART_TXDATA_REG);
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for (i = 0; i < 0x10000; i++) {
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if (readl(port->membase + ALTERA_UART_STATUS_REG) &
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ALTERA_UART_STATUS_TRDY_MSK)
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break;
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}
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}
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static void altera_uart_console_write(struct console *co, const char *s,
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unsigned int count)
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{
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for (; count; count--, s++) {
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altera_uart_console_putc(co, *s);
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if (*s == '\n')
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altera_uart_console_putc(co, '\r');
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}
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}
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static int __init altera_uart_console_setup(struct console *co, char *options)
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{
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struct uart_port *port;
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int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
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int bits = 8;
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int parity = 'n';
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int flow = 'n';
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if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
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return -EINVAL;
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port = &altera_uart_ports[co->index].port;
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if (port->membase == 0)
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return -ENODEV;
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if (options)
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uart_parse_options(options, &baud, &parity, &bits, &flow);
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return uart_set_options(port, co, baud, parity, bits, flow);
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}
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static struct uart_driver altera_uart_driver;
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static struct console altera_uart_console = {
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.name = "ttyS",
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.write = altera_uart_console_write,
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|
.device = uart_console_device,
|
|
.setup = altera_uart_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &altera_uart_driver,
|
|
};
|
|
|
|
static int __init altera_uart_console_init(void)
|
|
{
|
|
register_console(&altera_uart_console);
|
|
return 0;
|
|
}
|
|
|
|
console_initcall(altera_uart_console_init);
|
|
|
|
#define ALTERA_UART_CONSOLE (&altera_uart_console)
|
|
|
|
#else
|
|
|
|
#define ALTERA_UART_CONSOLE NULL
|
|
|
|
#endif /* CONFIG_ALTERA_UART_CONSOLE */
|
|
|
|
/*
|
|
* Define the altera_uart UART driver structure.
|
|
*/
|
|
static struct uart_driver altera_uart_driver = {
|
|
.owner = THIS_MODULE,
|
|
.driver_name = DRV_NAME,
|
|
.dev_name = "ttyS",
|
|
.major = TTY_MAJOR,
|
|
.minor = 64,
|
|
.nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
|
|
.cons = ALTERA_UART_CONSOLE,
|
|
};
|
|
|
|
static int __devinit altera_uart_probe(struct platform_device *pdev)
|
|
{
|
|
struct altera_uart_platform_uart *platp = pdev->dev.platform_data;
|
|
struct uart_port *port;
|
|
int i;
|
|
|
|
for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS && platp[i].mapbase; i++) {
|
|
port = &altera_uart_ports[i].port;
|
|
|
|
port->line = i;
|
|
port->type = PORT_ALTERA_UART;
|
|
port->mapbase = platp[i].mapbase;
|
|
port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
|
|
port->iotype = SERIAL_IO_MEM;
|
|
port->irq = platp[i].irq;
|
|
port->uartclk = platp[i].uartclk;
|
|
port->ops = &altera_uart_ops;
|
|
port->flags = ASYNC_BOOT_AUTOCONF;
|
|
|
|
uart_add_one_port(&altera_uart_driver, port);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int altera_uart_remove(struct platform_device *pdev)
|
|
{
|
|
struct uart_port *port;
|
|
int i;
|
|
|
|
for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++) {
|
|
port = &altera_uart_ports[i].port;
|
|
if (port)
|
|
uart_remove_one_port(&altera_uart_driver, port);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver altera_uart_platform_driver = {
|
|
.probe = altera_uart_probe,
|
|
.remove = __devexit_p(altera_uart_remove),
|
|
.driver = {
|
|
.name = DRV_NAME,
|
|
.owner = THIS_MODULE,
|
|
.pm = NULL,
|
|
},
|
|
};
|
|
|
|
static int __init altera_uart_init(void)
|
|
{
|
|
int rc;
|
|
|
|
rc = uart_register_driver(&altera_uart_driver);
|
|
if (rc)
|
|
return rc;
|
|
rc = platform_driver_register(&altera_uart_platform_driver);
|
|
if (rc) {
|
|
uart_unregister_driver(&altera_uart_driver);
|
|
return rc;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void __exit altera_uart_exit(void)
|
|
{
|
|
platform_driver_unregister(&altera_uart_platform_driver);
|
|
uart_unregister_driver(&altera_uart_driver);
|
|
}
|
|
|
|
module_init(altera_uart_init);
|
|
module_exit(altera_uart_exit);
|
|
|
|
MODULE_DESCRIPTION("Altera UART driver");
|
|
MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS("platform:" DRV_NAME);
|