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A large number of cleanups, all over the platforms. This is dominated largely by the Samsung platforms (s3c, s5p, exynos) and a few of the others moving code out of arch/arm into more appropriate subsystems. The clocksource and irqchip drivers are now abstracted to the point where platforms that are already cleaned up do not need to even specify the driver they use, it can all get configured from the device tree as we do for normal device drivers. The clocksource changes basically touch every single platform in the process. We further clean up the use of platform specific header files here, with the goal of turning more of the platforms over to being "multiplatform" enabled, which implies that they cannot expose their headers to architecture independent code any more. It is expected that no functional changes are part of the cleanup. The overall reduction in total code lines is mostly the result of removing broken and obsolete code. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAUSUyKmCrR//JCVInAQIN8RAAnb/uPytmlMjn5yCksF4Mvb/FVbn/TVwz KRIGpCHOzyKK1q7pM8NRUVWfjW2SZqbXJFqx6zBGKSlDPvFTOhsLyyupU+Tnyu5W IX4eIUBwb+a6H7XDHw0X2YI8uHzi5RNLhne0A1QyDKcnuHs1LDAttXnJHaK4Ap6Y NN2YFt3l3ld7DXWXJtMsw5v8lC10aeIFGTvXefaPDAdeMLivmI57qEUMDXknNr7W Odz/Rc0/cw3BNBVl/zNHA0jw7FOjKAymCYYNUa4xDCJEr+JnIRTqizd0N/YIIC7x aA2xjJ3oKUFyF51yiJE6nFuTyJznhwtehc+uiMOSIkjrPLym52LEHmd7G5Yqlmjz oiei09qBb870q3lGxwfht9iaeIwYgQFYGfD0yW5QWArCO5pxhtCPLPH7YZNZtcQd ZJRSGGqT/ljBz3bm0K9OLESeeTTN7+Nxvtpiz/CD+Piegz0gWJzDYJRTzkJ3UWpA WTVhVQdWUeX2JrNkgM7Z3Tu8iXOe+LIEs7kVXGJZSREmIIZiRvR36UrODZtAkp9I 7YQ+srX/uaR832pgK0RrHK0zY0psU6MmIvhYxJZFbx7keiPA9eH6drb0x7tGqcUD FzEUzvcZvyqppndfBi+R60H/YKAhJDEXdwxzo6dyCpPQaW1T9GnzIqXuE1zin+Aw X7Y8YywMbHI= =DvgJ -----END PGP SIGNATURE----- Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Arnd Bergmann: "A large number of cleanups, all over the platforms. This is dominated largely by the Samsung platforms (s3c, s5p, exynos) and a few of the others moving code out of arch/arm into more appropriate subsystems. The clocksource and irqchip drivers are now abstracted to the point where platforms that are already cleaned up do not need to even specify the driver they use, it can all get configured from the device tree as we do for normal device drivers. The clocksource changes basically touch every single platform in the process. We further clean up the use of platform specific header files here, with the goal of turning more of the platforms over to being "multiplatform" enabled, which implies that they cannot expose their headers to architecture independent code any more. It is expected that no functional changes are part of the cleanup. The overall reduction in total code lines is mostly the result of removing broken and obsolete code." * tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (133 commits) ARM: mvebu: correct gated clock documentation ARM: kirkwood: add missing include for nsa310 ARM: exynos: move exynos4210-combiner to drivers/irqchip mfd: db8500-prcmu: update resource passing drivers/db8500-cpufreq: delete dangling include ARM: at91: remove NEOCORE 926 board sunxi: Cleanup the reset code and add meaningful registers defines ARM: S3C24XX: header mach/regs-mem.h local ARM: S3C24XX: header mach/regs-power.h local ARM: S3C24XX: header mach/regs-s3c2412-mem.h local ARM: S3C24XX: Remove plat-s3c24xx directory in arch/arm/ ARM: S3C24XX: transform s3c2443 subirqs into new structure ARM: S3C24XX: modify s3c2443 irq init to initialize all irqs ARM: S3C24XX: move s3c2443 irq code to irq.c ARM: S3C24XX: transform s3c2416 irqs into new structure ARM: S3C24XX: modify s3c2416 irq init to initialize all irqs ARM: S3C24XX: move s3c2416 irq init to common irq code ARM: S3C24XX: Modify s3c_irq_wake to use the hwirq property ARM: S3C24XX: Move irq syscore-ops to irq-pm clocksource: always define CLOCKSOURCE_OF_DECLARE ...
336 lines
8.1 KiB
C
336 lines
8.1 KiB
C
/*
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* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* EXYNOS - CPU frequency scaling support for EXYNOS series
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/regulator/consumer.h>
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#include <linux/cpufreq.h>
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#include <linux/suspend.h>
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#include <plat/cpu.h>
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#include "exynos-cpufreq.h"
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static struct exynos_dvfs_info *exynos_info;
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static struct regulator *arm_regulator;
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static struct cpufreq_freqs freqs;
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static unsigned int locking_frequency;
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static bool frequency_locked;
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static DEFINE_MUTEX(cpufreq_lock);
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static int exynos_verify_speed(struct cpufreq_policy *policy)
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{
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return cpufreq_frequency_table_verify(policy,
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exynos_info->freq_table);
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}
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static unsigned int exynos_getspeed(unsigned int cpu)
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{
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return clk_get_rate(exynos_info->cpu_clk) / 1000;
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}
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static int exynos_cpufreq_get_index(unsigned int freq)
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{
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struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
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int index;
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for (index = 0;
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freq_table[index].frequency != CPUFREQ_TABLE_END; index++)
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if (freq_table[index].frequency == freq)
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break;
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if (freq_table[index].frequency == CPUFREQ_TABLE_END)
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return -EINVAL;
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return index;
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}
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static int exynos_cpufreq_scale(unsigned int target_freq)
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{
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struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
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unsigned int *volt_table = exynos_info->volt_table;
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struct cpufreq_policy *policy = cpufreq_cpu_get(0);
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unsigned int arm_volt, safe_arm_volt = 0;
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unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
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int index, old_index;
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int ret = 0;
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freqs.old = policy->cur;
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freqs.new = target_freq;
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freqs.cpu = policy->cpu;
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if (freqs.new == freqs.old)
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goto out;
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/*
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* The policy max have been changed so that we cannot get proper
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* old_index with cpufreq_frequency_table_target(). Thus, ignore
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* policy and get the index from the raw freqeuncy table.
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*/
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old_index = exynos_cpufreq_get_index(freqs.old);
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if (old_index < 0) {
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ret = old_index;
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goto out;
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}
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index = exynos_cpufreq_get_index(target_freq);
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if (index < 0) {
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ret = index;
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goto out;
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}
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/*
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* ARM clock source will be changed APLL to MPLL temporary
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* To support this level, need to control regulator for
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* required voltage level
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*/
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if (exynos_info->need_apll_change != NULL) {
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if (exynos_info->need_apll_change(old_index, index) &&
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(freq_table[index].frequency < mpll_freq_khz) &&
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(freq_table[old_index].frequency < mpll_freq_khz))
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safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
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}
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arm_volt = volt_table[index];
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for_each_cpu(freqs.cpu, policy->cpus)
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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/* When the new frequency is higher than current frequency */
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if ((freqs.new > freqs.old) && !safe_arm_volt) {
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/* Firstly, voltage up to increase frequency */
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ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
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if (ret) {
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pr_err("%s: failed to set cpu voltage to %d\n",
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__func__, arm_volt);
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goto out;
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}
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}
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if (safe_arm_volt) {
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ret = regulator_set_voltage(arm_regulator, safe_arm_volt,
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safe_arm_volt);
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if (ret) {
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pr_err("%s: failed to set cpu voltage to %d\n",
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__func__, safe_arm_volt);
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goto out;
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}
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}
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exynos_info->set_freq(old_index, index);
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for_each_cpu(freqs.cpu, policy->cpus)
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cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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/* When the new frequency is lower than current frequency */
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if ((freqs.new < freqs.old) ||
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((freqs.new > freqs.old) && safe_arm_volt)) {
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/* down the voltage after frequency change */
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regulator_set_voltage(arm_regulator, arm_volt,
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arm_volt);
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if (ret) {
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pr_err("%s: failed to set cpu voltage to %d\n",
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__func__, arm_volt);
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goto out;
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}
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}
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out:
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cpufreq_cpu_put(policy);
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return ret;
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}
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static int exynos_target(struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int relation)
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{
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struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
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unsigned int index;
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unsigned int new_freq;
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int ret = 0;
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mutex_lock(&cpufreq_lock);
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if (frequency_locked)
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goto out;
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if (cpufreq_frequency_table_target(policy, freq_table,
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target_freq, relation, &index)) {
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ret = -EINVAL;
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goto out;
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}
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new_freq = freq_table[index].frequency;
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ret = exynos_cpufreq_scale(new_freq);
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out:
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mutex_unlock(&cpufreq_lock);
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return ret;
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}
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#ifdef CONFIG_PM
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static int exynos_cpufreq_suspend(struct cpufreq_policy *policy)
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{
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return 0;
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}
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static int exynos_cpufreq_resume(struct cpufreq_policy *policy)
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{
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return 0;
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}
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#endif
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/**
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* exynos_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume
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* context
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* @notifier
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* @pm_event
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* @v
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*
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* While frequency_locked == true, target() ignores every frequency but
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* locking_frequency. The locking_frequency value is the initial frequency,
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* which is set by the bootloader. In order to eliminate possible
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* inconsistency in clock values, we save and restore frequencies during
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* suspend and resume and block CPUFREQ activities. Note that the standard
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* suspend/resume cannot be used as they are too deep (syscore_ops) for
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* regulator actions.
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*/
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static int exynos_cpufreq_pm_notifier(struct notifier_block *notifier,
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unsigned long pm_event, void *v)
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{
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int ret;
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switch (pm_event) {
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case PM_SUSPEND_PREPARE:
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mutex_lock(&cpufreq_lock);
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frequency_locked = true;
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mutex_unlock(&cpufreq_lock);
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ret = exynos_cpufreq_scale(locking_frequency);
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if (ret < 0)
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return NOTIFY_BAD;
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break;
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case PM_POST_SUSPEND:
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mutex_lock(&cpufreq_lock);
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frequency_locked = false;
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mutex_unlock(&cpufreq_lock);
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break;
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}
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return NOTIFY_OK;
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}
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static struct notifier_block exynos_cpufreq_nb = {
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.notifier_call = exynos_cpufreq_pm_notifier,
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};
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static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
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{
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policy->cur = policy->min = policy->max = exynos_getspeed(policy->cpu);
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cpufreq_frequency_table_get_attr(exynos_info->freq_table, policy->cpu);
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/* set the transition latency value */
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policy->cpuinfo.transition_latency = 100000;
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cpumask_setall(policy->cpus);
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return cpufreq_frequency_table_cpuinfo(policy, exynos_info->freq_table);
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}
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static int exynos_cpufreq_cpu_exit(struct cpufreq_policy *policy)
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{
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cpufreq_frequency_table_put_attr(policy->cpu);
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return 0;
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}
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static struct freq_attr *exynos_cpufreq_attr[] = {
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&cpufreq_freq_attr_scaling_available_freqs,
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NULL,
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};
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static struct cpufreq_driver exynos_driver = {
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.flags = CPUFREQ_STICKY,
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.verify = exynos_verify_speed,
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.target = exynos_target,
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.get = exynos_getspeed,
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.init = exynos_cpufreq_cpu_init,
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.exit = exynos_cpufreq_cpu_exit,
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.name = "exynos_cpufreq",
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.attr = exynos_cpufreq_attr,
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#ifdef CONFIG_PM
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.suspend = exynos_cpufreq_suspend,
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.resume = exynos_cpufreq_resume,
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#endif
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};
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static int __init exynos_cpufreq_init(void)
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{
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int ret = -EINVAL;
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exynos_info = kzalloc(sizeof(struct exynos_dvfs_info), GFP_KERNEL);
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if (!exynos_info)
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return -ENOMEM;
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if (soc_is_exynos4210())
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ret = exynos4210_cpufreq_init(exynos_info);
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else if (soc_is_exynos4212() || soc_is_exynos4412())
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ret = exynos4x12_cpufreq_init(exynos_info);
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else if (soc_is_exynos5250())
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ret = exynos5250_cpufreq_init(exynos_info);
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else
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pr_err("%s: CPU type not found\n", __func__);
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if (ret)
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goto err_vdd_arm;
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if (exynos_info->set_freq == NULL) {
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pr_err("%s: No set_freq function (ERR)\n", __func__);
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goto err_vdd_arm;
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}
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arm_regulator = regulator_get(NULL, "vdd_arm");
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if (IS_ERR(arm_regulator)) {
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pr_err("%s: failed to get resource vdd_arm\n", __func__);
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goto err_vdd_arm;
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}
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locking_frequency = exynos_getspeed(0);
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register_pm_notifier(&exynos_cpufreq_nb);
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if (cpufreq_register_driver(&exynos_driver)) {
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pr_err("%s: failed to register cpufreq driver\n", __func__);
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goto err_cpufreq;
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}
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return 0;
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err_cpufreq:
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unregister_pm_notifier(&exynos_cpufreq_nb);
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regulator_put(arm_regulator);
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err_vdd_arm:
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kfree(exynos_info);
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pr_debug("%s: failed initialization\n", __func__);
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return -EINVAL;
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}
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late_initcall(exynos_cpufreq_init);
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