105 lines
3.6 KiB
C
105 lines
3.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2016-2018 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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/************************************
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** This is an auto-generated file **
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** DO NOT EDIT BELOW **
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************************************/
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#ifndef ASIC_REG_CPU_PLL_REGS_H_
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#define ASIC_REG_CPU_PLL_REGS_H_
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/*
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*****************************************
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* CPU_PLL (Prototype: PLL)
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*****************************************
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*/
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#define mmCPU_PLL_NR 0x4A2100
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#define mmCPU_PLL_NF 0x4A2104
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#define mmCPU_PLL_OD 0x4A2108
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#define mmCPU_PLL_NB 0x4A210C
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#define mmCPU_PLL_CFG 0x4A2110
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#define mmCPU_PLL_LOSE_MASK 0x4A2120
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#define mmCPU_PLL_LOCK_INTR 0x4A2128
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#define mmCPU_PLL_LOCK_BYPASS 0x4A212C
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#define mmCPU_PLL_DATA_CHNG 0x4A2130
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#define mmCPU_PLL_RST 0x4A2134
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#define mmCPU_PLL_SLIP_WD_CNTR 0x4A2150
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#define mmCPU_PLL_DIV_FACTOR_0 0x4A2200
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#define mmCPU_PLL_DIV_FACTOR_1 0x4A2204
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#define mmCPU_PLL_DIV_FACTOR_2 0x4A2208
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#define mmCPU_PLL_DIV_FACTOR_3 0x4A220C
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#define mmCPU_PLL_DIV_FACTOR_CMD_0 0x4A2220
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#define mmCPU_PLL_DIV_FACTOR_CMD_1 0x4A2224
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#define mmCPU_PLL_DIV_FACTOR_CMD_2 0x4A2228
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#define mmCPU_PLL_DIV_FACTOR_CMD_3 0x4A222C
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#define mmCPU_PLL_DIV_SEL_0 0x4A2280
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#define mmCPU_PLL_DIV_SEL_1 0x4A2284
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#define mmCPU_PLL_DIV_SEL_2 0x4A2288
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#define mmCPU_PLL_DIV_SEL_3 0x4A228C
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#define mmCPU_PLL_DIV_EN_0 0x4A22A0
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#define mmCPU_PLL_DIV_EN_1 0x4A22A4
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#define mmCPU_PLL_DIV_EN_2 0x4A22A8
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#define mmCPU_PLL_DIV_EN_3 0x4A22AC
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#define mmCPU_PLL_DIV_FACTOR_BUSY_0 0x4A22C0
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#define mmCPU_PLL_DIV_FACTOR_BUSY_1 0x4A22C4
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#define mmCPU_PLL_DIV_FACTOR_BUSY_2 0x4A22C8
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#define mmCPU_PLL_DIV_FACTOR_BUSY_3 0x4A22CC
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#define mmCPU_PLL_CLK_GATER 0x4A2300
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#define mmCPU_PLL_CLK_RLX_0 0x4A2310
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#define mmCPU_PLL_CLK_RLX_1 0x4A2314
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#define mmCPU_PLL_CLK_RLX_2 0x4A2318
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#define mmCPU_PLL_CLK_RLX_3 0x4A231C
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#define mmCPU_PLL_REF_CNTR_PERIOD 0x4A2400
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#define mmCPU_PLL_REF_LOW_THRESHOLD 0x4A2410
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#define mmCPU_PLL_REF_HIGH_THRESHOLD 0x4A2420
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#define mmCPU_PLL_PLL_NOT_STABLE 0x4A2430
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#define mmCPU_PLL_FREQ_CALC_EN 0x4A2440
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#endif /* ASIC_REG_CPU_PLL_REGS_H_ */
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