181 lines
6.6 KiB
C
181 lines
6.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright 2016-2018 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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/************************************
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** This is an auto-generated file **
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** DO NOT EDIT BELOW **
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************************************/
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#ifndef ASIC_REG_DMA_MACRO_REGS_H_
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#define ASIC_REG_DMA_MACRO_REGS_H_
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/*
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*****************************************
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* DMA_MACRO (Prototype: DMA_MACRO)
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*****************************************
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*/
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#define mmDMA_MACRO_LBW_RANGE_HIT_BLOCK 0x4B0000
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#define mmDMA_MACRO_LBW_RANGE_MASK_0 0x4B0004
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#define mmDMA_MACRO_LBW_RANGE_MASK_1 0x4B0008
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#define mmDMA_MACRO_LBW_RANGE_MASK_2 0x4B000C
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#define mmDMA_MACRO_LBW_RANGE_MASK_3 0x4B0010
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#define mmDMA_MACRO_LBW_RANGE_MASK_4 0x4B0014
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#define mmDMA_MACRO_LBW_RANGE_MASK_5 0x4B0018
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#define mmDMA_MACRO_LBW_RANGE_MASK_6 0x4B001C
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#define mmDMA_MACRO_LBW_RANGE_MASK_7 0x4B0020
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#define mmDMA_MACRO_LBW_RANGE_MASK_8 0x4B0024
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#define mmDMA_MACRO_LBW_RANGE_MASK_9 0x4B0028
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#define mmDMA_MACRO_LBW_RANGE_MASK_10 0x4B002C
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#define mmDMA_MACRO_LBW_RANGE_MASK_11 0x4B0030
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#define mmDMA_MACRO_LBW_RANGE_MASK_12 0x4B0034
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#define mmDMA_MACRO_LBW_RANGE_MASK_13 0x4B0038
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#define mmDMA_MACRO_LBW_RANGE_MASK_14 0x4B003C
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#define mmDMA_MACRO_LBW_RANGE_MASK_15 0x4B0040
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#define mmDMA_MACRO_LBW_RANGE_BASE_0 0x4B0044
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#define mmDMA_MACRO_LBW_RANGE_BASE_1 0x4B0048
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#define mmDMA_MACRO_LBW_RANGE_BASE_2 0x4B004C
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#define mmDMA_MACRO_LBW_RANGE_BASE_3 0x4B0050
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#define mmDMA_MACRO_LBW_RANGE_BASE_4 0x4B0054
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#define mmDMA_MACRO_LBW_RANGE_BASE_5 0x4B0058
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#define mmDMA_MACRO_LBW_RANGE_BASE_6 0x4B005C
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#define mmDMA_MACRO_LBW_RANGE_BASE_7 0x4B0060
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#define mmDMA_MACRO_LBW_RANGE_BASE_8 0x4B0064
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#define mmDMA_MACRO_LBW_RANGE_BASE_9 0x4B0068
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#define mmDMA_MACRO_LBW_RANGE_BASE_10 0x4B006C
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#define mmDMA_MACRO_LBW_RANGE_BASE_11 0x4B0070
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#define mmDMA_MACRO_LBW_RANGE_BASE_12 0x4B0074
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#define mmDMA_MACRO_LBW_RANGE_BASE_13 0x4B0078
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#define mmDMA_MACRO_LBW_RANGE_BASE_14 0x4B007C
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#define mmDMA_MACRO_LBW_RANGE_BASE_15 0x4B0080
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#define mmDMA_MACRO_HBW_RANGE_HIT_BLOCK 0x4B0084
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#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_0 0x4B00A8
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#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_1 0x4B00AC
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#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_2 0x4B00B0
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#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_3 0x4B00B4
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#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_4 0x4B00B8
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#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_5 0x4B00BC
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#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_6 0x4B00C0
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#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_7 0x4B00C4
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#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_0 0x4B00C8
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#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_1 0x4B00CC
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#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_2 0x4B00D0
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#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_3 0x4B00D4
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#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_4 0x4B00D8
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#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_5 0x4B00DC
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#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_6 0x4B00E0
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#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_7 0x4B00E4
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#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_0 0x4B00E8
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#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_1 0x4B00EC
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#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_2 0x4B00F0
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#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_3 0x4B00F4
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#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_4 0x4B00F8
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#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_5 0x4B00FC
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#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_6 0x4B0100
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#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_7 0x4B0104
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#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_0 0x4B0108
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#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_1 0x4B010C
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#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_2 0x4B0110
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#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_3 0x4B0114
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#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_4 0x4B0118
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#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_5 0x4B011C
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#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_6 0x4B0120
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#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_7 0x4B0124
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#define mmDMA_MACRO_WRITE_EN 0x4B0128
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#define mmDMA_MACRO_WRITE_CREDIT 0x4B012C
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#define mmDMA_MACRO_READ_EN 0x4B0130
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#define mmDMA_MACRO_READ_CREDIT 0x4B0134
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#define mmDMA_MACRO_SRAM_BUSY 0x4B0138
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#define mmDMA_MACRO_RAZWI_LBW_WT_VLD 0x4B013C
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#define mmDMA_MACRO_RAZWI_LBW_WT_ID 0x4B0140
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#define mmDMA_MACRO_RAZWI_LBW_RD_VLD 0x4B0144
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#define mmDMA_MACRO_RAZWI_LBW_RD_ID 0x4B0148
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#define mmDMA_MACRO_RAZWI_HBW_WT_VLD 0x4B014C
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#define mmDMA_MACRO_RAZWI_HBW_WT_ID 0x4B0150
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#define mmDMA_MACRO_RAZWI_HBW_RD_VLD 0x4B0154
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#define mmDMA_MACRO_RAZWI_HBW_RD_ID 0x4B0158
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#endif /* ASIC_REG_DMA_MACRO_REGS_H_ */
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