f7089d923e
The DI pixel clock divider bit field is only 8 bits wide for the integer part, so limit the divider to the 1...255 interval before deciding whether the internal clock can be used and before writing to the register. Reported-by: Felix Mellmann <felix.mellmann@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
||
|---|---|---|
| .. | ||
| ipu-common.c | ||
| ipu-cpmem.c | ||
| ipu-csi.c | ||
| ipu-dc.c | ||
| ipu-di.c | ||
| ipu-dmfc.c | ||
| ipu-dp.c | ||
| ipu-ic.c | ||
| ipu-prv.h | ||
| ipu-smfc.c | ||
| Kconfig | ||
| Makefile | ||