Jon Mason f713c6bf32 clk: iproc: Split off dig_filter ... The PLL loop filter/gain can be located in a separate register on some SoCs. Split these off into a separate variable, so that an offset can be added if necessary. Also, make the necessary modifications to the Cygnus and NSP drivers for this change. Signed-off-by: Jon Mason <jonmason@broadcom.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>		2015-10-21 17:02:57 -07:00
..
Kconfig	ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabled	2015-10-21 16:52:57 -07:00
Makefile	clk: nsp: add clock support for Broadcom Northstar Plus SoC	2015-10-21 16:53:20 -07:00
clk-bcm281xx.c	clk: bcm281xx: move compatible string definitions	2014-04-30 11:51:39 -07:00
clk-bcm21664.c	clk: bcm21664: use common clock framework	2014-04-30 11:51:44 -07:00
clk-cygnus.c	clk: iproc: Split off dig_filter	2015-10-21 17:02:57 -07:00
clk-iproc-armpll.c	clk: iproc: add initial common clock support	2015-06-18 12:36:38 -07:00
clk-iproc-asiu.c	clk: iproc: fix memory leak from clock name	2015-07-02 09:50:26 -07:00
clk-iproc-pll.c	clk: iproc: Split off dig_filter	2015-10-21 17:02:57 -07:00
clk-iproc.h	clk: iproc: Split off dig_filter	2015-10-21 17:02:57 -07:00
clk-kona-setup.c	clk: bcm/kona: Remove ccu_list	2015-05-14 17:11:20 -07:00
clk-kona.c	clk: bcm: Convert to clk_hw based provider APIs	2015-08-24 16:48:48 -07:00
clk-kona.h	clk: bcm/kona: Remove ccu_list	2015-05-14 17:11:20 -07:00
clk-nsp.c	clk: iproc: Split off dig_filter	2015-10-21 17:02:57 -07:00