![Thomas Gleixner](/assets/img/avatar_default.png)
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
152 lines
3.7 KiB
C
152 lines
3.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2014 Linaro Ltd.
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*
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* Author: Linus Walleij <linus.walleij@linaro.org>
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/sys_soc.h>
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#include <linux/platform_device.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include <linux/of.h>
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#define INTEGRATOR_HDR_ID_OFFSET 0x00
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static u32 integrator_coreid;
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static const struct of_device_id integrator_cm_match[] = {
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{ .compatible = "arm,core-module-integrator", },
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{ }
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};
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static const char *integrator_arch_str(u32 id)
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{
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switch ((id >> 16) & 0xff) {
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case 0x00:
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return "ASB little-endian";
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case 0x01:
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return "AHB little-endian";
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case 0x03:
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return "AHB-Lite system bus, bi-endian";
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case 0x04:
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return "AHB";
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case 0x08:
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return "AHB system bus, ASB processor bus";
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default:
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return "Unknown";
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}
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}
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static const char *integrator_fpga_str(u32 id)
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{
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switch ((id >> 12) & 0xf) {
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case 0x01:
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return "XC4062";
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case 0x02:
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return "XC4085";
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case 0x03:
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return "XVC600";
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case 0x04:
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return "EPM7256AE (Altera PLD)";
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default:
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return "Unknown";
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}
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}
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static ssize_t integrator_get_manf(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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return sprintf(buf, "%02x\n", integrator_coreid >> 24);
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}
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static struct device_attribute integrator_manf_attr =
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__ATTR(manufacturer, S_IRUGO, integrator_get_manf, NULL);
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static ssize_t integrator_get_arch(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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return sprintf(buf, "%s\n", integrator_arch_str(integrator_coreid));
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}
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static struct device_attribute integrator_arch_attr =
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__ATTR(arch, S_IRUGO, integrator_get_arch, NULL);
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static ssize_t integrator_get_fpga(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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return sprintf(buf, "%s\n", integrator_fpga_str(integrator_coreid));
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}
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static struct device_attribute integrator_fpga_attr =
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__ATTR(fpga, S_IRUGO, integrator_get_fpga, NULL);
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static ssize_t integrator_get_build(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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return sprintf(buf, "%02x\n", (integrator_coreid >> 4) & 0xFF);
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}
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static struct device_attribute integrator_build_attr =
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__ATTR(build, S_IRUGO, integrator_get_build, NULL);
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static int __init integrator_soc_init(void)
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{
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static struct regmap *syscon_regmap;
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struct soc_device *soc_dev;
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struct soc_device_attribute *soc_dev_attr;
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struct device_node *np;
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struct device *dev;
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u32 val;
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int ret;
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np = of_find_matching_node(NULL, integrator_cm_match);
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if (!np)
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return -ENODEV;
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syscon_regmap = syscon_node_to_regmap(np);
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if (IS_ERR(syscon_regmap))
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return PTR_ERR(syscon_regmap);
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ret = regmap_read(syscon_regmap, INTEGRATOR_HDR_ID_OFFSET,
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&val);
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if (ret)
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return -ENODEV;
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integrator_coreid = val;
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soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
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if (!soc_dev_attr)
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return -ENOMEM;
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soc_dev_attr->soc_id = "Integrator";
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soc_dev_attr->machine = "Integrator";
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soc_dev_attr->family = "Versatile";
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soc_dev = soc_device_register(soc_dev_attr);
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if (IS_ERR(soc_dev)) {
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kfree(soc_dev_attr);
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return -ENODEV;
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}
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dev = soc_device_to_device(soc_dev);
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device_create_file(dev, &integrator_manf_attr);
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device_create_file(dev, &integrator_arch_attr);
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device_create_file(dev, &integrator_fpga_attr);
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device_create_file(dev, &integrator_build_attr);
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dev_info(dev, "Detected ARM core module:\n");
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dev_info(dev, " Manufacturer: %02x\n", (val >> 24));
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dev_info(dev, " Architecture: %s\n", integrator_arch_str(val));
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dev_info(dev, " FPGA: %s\n", integrator_fpga_str(val));
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dev_info(dev, " Build: %02x\n", (val >> 4) & 0xFF);
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dev_info(dev, " Rev: %c\n", ('A' + (val & 0x03)));
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return 0;
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}
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device_initcall(integrator_soc_init);
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