![Ralf Baechle](/assets/img/avatar_default.png)
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
117 lines
3 KiB
C
117 lines
3 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994, 95, 96, 97, 98, 99, 2000 by Ralf Baechle
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* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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*/
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#ifndef _UAPI_ASM_PTRACE_H
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#define _UAPI_ASM_PTRACE_H
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/* 0 - 31 are integer registers, 32 - 63 are fp registers. */
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#define FPR_BASE 32
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#define PC 64
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#define CAUSE 65
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#define BADVADDR 66
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#define MMHI 67
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#define MMLO 68
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#define FPC_CSR 69
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#define FPC_EIR 70
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#define DSP_BASE 71 /* 3 more hi / lo register pairs */
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#define DSP_CONTROL 77
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#define ACX 78
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/*
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* This struct defines the way the registers are stored on the stack during a
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* system call/exception. As usual the registers k0/k1 aren't being saved.
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*/
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struct pt_regs {
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#ifdef CONFIG_32BIT
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/* Pad bytes for argument save space on the stack. */
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unsigned long pad0[6];
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#endif
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/* Saved main processor registers. */
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unsigned long regs[32];
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/* Saved special registers. */
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unsigned long cp0_status;
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unsigned long hi;
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unsigned long lo;
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#ifdef CONFIG_CPU_HAS_SMARTMIPS
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unsigned long acx;
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#endif
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unsigned long cp0_badvaddr;
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unsigned long cp0_cause;
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unsigned long cp0_epc;
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#ifdef CONFIG_MIPS_MT_SMTC
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unsigned long cp0_tcstatus;
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#endif /* CONFIG_MIPS_MT_SMTC */
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#ifdef CONFIG_CPU_CAVIUM_OCTEON
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unsigned long long mpl[3]; /* MTM{0,1,2} */
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unsigned long long mtp[3]; /* MTP{0,1,2} */
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#endif
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} __attribute__ ((aligned (8)));
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/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
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#define PTRACE_GETREGS 12
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#define PTRACE_SETREGS 13
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#define PTRACE_GETFPREGS 14
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#define PTRACE_SETFPREGS 15
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/* #define PTRACE_GETFPXREGS 18 */
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/* #define PTRACE_SETFPXREGS 19 */
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#define PTRACE_OLDSETOPTIONS 21
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#define PTRACE_GET_THREAD_AREA 25
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#define PTRACE_SET_THREAD_AREA 26
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/* Calls to trace a 64bit program from a 32bit program. */
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#define PTRACE_PEEKTEXT_3264 0xc0
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#define PTRACE_PEEKDATA_3264 0xc1
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#define PTRACE_POKETEXT_3264 0xc2
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#define PTRACE_POKEDATA_3264 0xc3
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#define PTRACE_GET_THREAD_AREA_3264 0xc4
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/* Read and write watchpoint registers. */
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enum pt_watch_style {
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pt_watch_style_mips32,
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pt_watch_style_mips64
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};
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struct mips32_watch_regs {
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unsigned int watchlo[8];
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/* Lower 16 bits of watchhi. */
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unsigned short watchhi[8];
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/* Valid mask and I R W bits.
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* bit 0 -- 1 if W bit is usable.
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* bit 1 -- 1 if R bit is usable.
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* bit 2 -- 1 if I bit is usable.
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* bits 3 - 11 -- Valid watchhi mask bits.
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*/
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unsigned short watch_masks[8];
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/* The number of valid watch register pairs. */
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unsigned int num_valid;
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} __attribute__((aligned(8)));
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struct mips64_watch_regs {
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unsigned long long watchlo[8];
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unsigned short watchhi[8];
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unsigned short watch_masks[8];
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unsigned int num_valid;
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} __attribute__((aligned(8)));
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struct pt_watch_regs {
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enum pt_watch_style style;
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union {
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struct mips32_watch_regs mips32;
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struct mips64_watch_regs mips64;
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};
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};
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#define PTRACE_GET_WATCH_REGS 0xd0
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#define PTRACE_SET_WATCH_REGS 0xd1
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#endif /* _UAPI_ASM_PTRACE_H */
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